Focus detecting device with photo-sensor array

ABSTRACT

A focus detecting device which performs focus detection in such a manner that an image of an object formed through an image forming lens is received by an array of many electric charge storing type photo-sensors and, under such a condition, the image is electrically scanned by extracting, in a time serial manner, the output of each photo-sensor, and then the sharpness of the image is detected from a scanning output thus obtained; or that two images of the object which are formed through a range-finding optical system with an apparent parallax corresponding to distance to the object are received by different arrays of such photo-sensors respectively and, under such a condition, the two images are electrically scanned separately from each other by extracting, in a time serial manner, the output of each of the photo-sensors and scanning outputs thus obtained are compared with each other to detect the relative parallax of the two images. In this device, for making the scanning output of the photo-sensor array or arrays always correct irrespective of variation in the brightness of the object, the scanning recycle time duration of the photo-sensor array or arrays is automatically adjusted according to the brightness of the object; and, accordingly, the electric charge storing time of each photo-sensor in the photo-sensor array or arrays are automatically adjusted thereby.

This is a continuation of application Ser. No. 819,235 filed on July 26,1977, now abandoned.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a focus detecting device using one or morearrays of photo-sensors and more particularly to an improvement in afocus detecting device of a type wherein focus detection is performed byreceiving one or more images of an object formed through image formingoptical means with one or more arrays of many electric charge storingtype photo-sensors, or one or more photo-sensor arrays, which operate inan electric charge storing mode; then, by extracting, the output of eachof the photo-sensors in a time serial manner, to electrically scan theimage or images received by them; and then by processing the output oroutputs of such scanning in a suitable manner.

2. Description of the Prior Art

In a focus detecting device of a type well known in the art, an imageforming lens forms an image of an object on a photo-electric transducingelement which changes its output (an internal resistance value)according as the sharpness of the image changes and, in a process ofmoving the lens along its optical axis, a just focus is attained whenthe output (the internal resistance value) of the photo-electrictransducing element has reached its extreme value.

In another type of focus detecting device which is also well known inthe art, two images of an object are formed respectively on differentphoto-electric transducing elements through a range finding opticalsystem, with apparent parallax corresponding to the distance to theobject, and, in a process of shifting one image toward the other inresponse to a focus adjusting operation of an objective lens, a justfocus is attained when the outputs (internal resistance values) of thetwo transducing elements have come to coincide with each other or, inother words, when the positions of the two images have come to coincidewith each other.

In the meantime, rapid advancement of semiconductor technology has madecommerically available, at relatively low prices, photo-sensor arrays,such as a photo-diode array (MOS-image sensor), CCD (a charge coupleddevice), BBD (a bucket brigade device), etc. The photo-sensor array,such as a CCD or a BBD is composed of many photo-sensors of an electriccharge storing type. The output of each of these charge storingphoto-sensors can be taken out one after another in a time serial mannerby applying a start pulse and scanning pulses through a driver circuit.Accordingly, with such a photo-sensor array employed, a video signalaccurately representing an image of an object formed by an image forminglens is obtainable by scanning, in a purely electrical manner, the imageof the object, so that focus detection can be accomplished with higheraccuracy thereby.

Therefore, in view of such an advantageous function of a photo-sensorarray, there have been made many attempts to utilize such a photo-sensorarray for focus detection.

As for an example of an improvement over the former type of the twoconventionally known types of focus detecting devices mentioned in theforegoing, a device has been proposed by the same assignee of thepresent invention under U.S. patent application Ser. No. 563,462, filedon Mar. 31, 1976, entitled "A SYSTEM FOR EXPOSURE MEASUREMENT AND/ORFOCUS DETECTION BY MEANS OF IMAGE SENSOR". In this device, an image ofan object formed by an image forming lens on an area type photo-sensorarray (a matrix sensor array) and, under such a condition, the outputsof the photo-sensors are taken out in time series and then are convertedinto digital values one after another by an analog-to-digital convertor.Then, the difference between the digital converted output signals of apair of sensors which are adjoining each other in the array are obtainedin absolute value by means of a subtracter. The difference signals thusobtained from all of the sensors in the sensor array are accumulated byan accumulator in one scanning operation and the results of theaccumulation is used as information on image sharpness.

And as for an example of improvement over the latter of the two types ofconventional focus detecting devices mentioned in the foregoing, adevice has been proposed by the same assignee of the present inventionfor U.S. Pat. No. 3,898,676, entitled "DISTANCE DETECTING DEVICE". Inthis device, two images of an object are formed through a range findingoptical system with apparent parallax corresponding to the distance tothe object and are respectively received by different photo-sensorarrays. Under such a condition, the output of each sensor issimultaneously taken out by time seriating means in a time serialmanner. After these outputs are sampled and held by means of asample-and-hold circuit, they are converted by a low pass filter intowave form signals. Then, the phase difference between the outputs ofthese photo-sensor array is detected by means of a phase discriminator.A motor is actuated by the output of the phase discriminator to shiftobjective lens means along its optical axis. Then, in response thereto,one of the two images is shifted toward the other and thus a just focusis attained when the phase difference between the wave form signals fromthe two sensor arrays becomes zero or, in other words, when thepositions of the images relatively come to coincide with each other.

On the other hand, when irradiated with light, the electric chargestoring type photo-sensors that constitute a photo-sensor array, such asa CCD or a BBD are capable of storing electric charge proportional tothe integrated amount of the incident light (intensity of light×time) ata speed corresponding to the intensity of the incident light. Generally,such a photo-sensor is applied in such a manner that, after electriccharge is discharged, electric charge corresponding to the integratedamount of incident light received during a period of time before nextdischarge is stored therein. Accordingly, the above stated period oftime is regarded as electric charge storing time of a photo-sensor.However, a storable quantity of electric charge is a photo-sensor, i.e.an electric charge saturation level, is predetermined and, as generallyknown, after such a saturation level is exceeded, an excess of electriccharge flows out to mix in other photo-sensors. This is known as a"blooming" effect, which makes it hardly possible to obtain correctvideo signals.

In addition to such a problem, when the quantity of the electric chargestored in a photo-sensor is extremely small, the S/N ratio (signal tonoise ratio) against a dark current and the like becomes too low forobtaining a correct picture element signal.

Where a photo-sensor array comprising such electric charge storing typephoto-sensors is used for a focus detecting device, therefore, theelectric charge stored in each photo-sensor must be controlled so as notto exceed its saturation level irrespective of variation in thebrightness of an object and, also for making the S/N ratio sufficientlyhigh for unfailingly obtaining a correct video signal, the integratedamount of light to be received by the photo-sensor must be adjusted to asuitable degree. Without such arrangement, it is hardly possible to makefocus detection with high accuracy using such a photo-sensor array.

SUMMARY OF THE INVENTION

In view of the above stated problems of the conventional devices,therefore, a principal object of this invention is to provide a novelfocus detecting device which uses one or more arrays of many electriccharge storing type photo-sensors, or one or more photo-sensor arraysoperative in an electric charge storing mode and which always gives acorrect video signal of the image irrespective of variation in thebrightness of an object so that focus detection can be unfallinglyaccomplished with high accuracy.

Another object of this invention is to provide an improved focusdetecting device which uses such a photo-sensor array or arrays andwhich scans an image while automatically adjusting the quantity ofelectric charge stored in each photo-sensor so as not to exceed itssaturation level, particularly in the case of a very bright object, sothat a correct video signal of the image can be always obtained forfocus detection.

Still another object of this invention is to provide a focus detectingdevice which uses such a photo-sensor array or arrays and which ensuresa correct video signal of the image irrespective of variation in thebrightness of an object by automatically adjusting the amount of lightreceived by each photo-sensor in the photo-sensor array or arraysaccording to the object's brightness.

In accordance with this invention, these objects are attained byautomatically adjusting the electric charge storing time of eachphoto-sensor in the photo-sensor array or arrays according to thebrightness of an object to automatically effect thereby adjustment ofthe amount of light received by each photo-sensor in such a manner thata correct video signal of the image can be always obtained irrespectiveof variation in the brightness of the object for highly accurate focusdetection. The term "electric charge storing time" as used here means,as mentioned in the foregoing, a period of time from discharge of theelectric charge to the time when the electric charge is again dischargedand can be also regarded as length of time duration for which light isreceived by each photo-sensor. Accordingly, the electric charge storingtime is automatically adjusted by shortening it for a bright object andlengthening it for a dark object, so that the amount of light receivedby each photo-sensor can be automatically adjusted according to thebrightness of the object. Compared with a method of, for example,directly adjusting the amount of light received by each photo-sensorthrough mechanical means, such as a diaphragm aperture, the method ofthis invention is very advantageous, because the amount of lightreceived by each photo-sensor can be more accurately adjusted in apurely electrical manner thus dispensing with the use of a complexmechanical arrangement.

A further object of this invention is to provide a circuit arrangementwhich performs automatic adjustment of the electric charge storing timeof each photo-sensor in accordance with the brightness of an object. Invarious embodiments of the invention in relation to this object, theelectric charge storing time of photo-sensors is adjusted byautomatically changing the scanning recycle time duration in scanning animage through the photo-sensor array or arrays according to thebrightness of the object. For driving the photo-sensor array, both startpulses and scanning pulses are necessary. The start pulses are appliedfor starting the scanning process. Following this, when scanning pulsesare applied, each photo-sensor is electrically driven by a correspondingscanning pulse one after another. Then, the interval of the start pulsegenerating cycle corresponds exactly to a scanning recycle time durationwhile the electric charge storing time of each photo-sensor in thephoto-sensor array is dependent on the scanning recycle time duration.In this case, after one start pulse is generated, the number of clocksignals produced by an oscillator to correspond to scanning pulses iscounted. When the count value reaches a certain setting value (which isof course a value sufficiently greater than the number of photo-sensorsincluded in the photo-sensor array), another start pulse is generatedfor starting the next scanning process. Accordingly, if, for example,the frequency of the clock signals from the oscillator which defines thefrequency of the scanning pulses is changed according to the brightnessof the object, this changes the interval of the start pulse generatingcycle and, in turn, the scanning recycle time duration is altered tochange the electric charge storing time of the photo-sensors accordingto the brightness of the object.

On the other hand, it is also possible to alter the start pulsegenerating cycle interval without changing the frequency of the clocksignals for producing the scanning pulses. As mentioned in theforegoing, the start pulse generating cycle is in a predeterminedrelation to the number of scanning pulses to be generated. When theobject is bright, the count value of the clock signals from theoscillator corresponding to the scanning pulses generated during theperiod from generation of one start pulse to generation of another startpulse is shifted to a smaller setting value than the above statedsetting value, although this smaller setting value also must be a valuegreater than the number of the photo-sensors included in thephoto-sensor array. In this case, the start pulse generating cycleinterval, or a scanning recycle time duration, naturally becomes shorterand, accordingly, the electric charge storing time is shortened thereby.

In one of the various preferred embodiments of this invention, there isprovided a circuit arrangement for altering the frequency of thescanning pulses and the start pulse generating cycle separately fromeach other. Compared with other arrangement of altering either one ofthe frequency of scanning pulses or the start pulse generating cycle,this arrangement is more advantageous in respect that this permits fineradjustment of the above stated electric charge storing time.

The above and further objects and novel features of this invention willmore apparent from the following detailed description when the same isread in connection with the accompanying drawings illustrating preferredembodiments thereof.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A is a schematic illustration of a basic construction of a CCD (acharge coupled device) as an example of the electric charge storing typephoto-sensor array usable in accordance with this invention.

FIG. 1B is a signal wave form chart showing the wave form of a drivingsignal to be applied to the CCD shown in FIG. 1A and the wave form of avideo signal obtained therefrom.

FIG. 2 is a schematic illustration of the relation of an object to animage of the object to be formed on a screen through a lens.

FIG. 3A illustrates the condition of an image formed on a screen whenthe lens is not correctly focussed at an image forming system shown inFIG. 2.

FIG. 3B is a graph illustrating a video signal obtained by electricallyscanning the image shown in FIG. 3A, using, for example, the CCD shownin FIG. 1A.

FIG. 4A illustrates the condition of an image formed on a screen whenthe lens is correctly focussed at the image forming system shown in FIG.2.

FIG. 4B is a graph illustrating a video signal obtained by electricallyscanning the image shown in FIG. 4A using, for example, the CCD shown inFIG. 1A.

FIG. 5A is a circuit diagram illustrating an embodiment of thisinvention based on the principle illustrated in FIG. 2 through FIG. 4and particularly the electrical circuit arrangement of the embodiment.

FIG. 5B is a wave form chart showing the wave form of the output signalof each circuit block obtained when the focus detecting deviceillustrated in FIG. 5A is in operation.

FIG. 6A is a circuit diagram illustrating a first example of theautomatic scanning control circuit which is employed in the focusdetecting device as an essential part for improvement to be effected inaccordance with this invention.

FIG. 6B is a wave form chart showing the wave form of the output signalproduced from each circuit block in the focus detecting device and theautomatic scanning control circuit shown in FIG. 6A when the focusdetecting device is in operation.

FIG. 7 is a circuit diagram illustrating a second example of theautomatic scanning control circuit.

FIG. 8 is a circuit diagram illustrating a third example of theautomatic scanning control circuit.

FIG. 9A is a circuit diagram illustrating an example of an automaticresetting circuit which is provided for automatically resetting theautomatic scanning control circuit illustrated in FIGS. 6A or 7.

FIG. 9B is a wave form chart showing the wave form of the output signalproduced from each circuit block in the focus detecting device and theautomatic resetting circuit shown in FIG. 9A when the focus detectingdevice is in operation.

FIG. 10A is a circuit diagram illustrating a fourth example of theautomatic scanning control circuit.

FIG. 10B is a wave form chart showing the wave form of the output signalproduced from each circuit block in the focus detecting device, theautomatic scanning control circuit shown in FIG. 10A and the automaticresetting circuit when the focus detecting device is in operation.

FIG. 11 is a circuit diagram illustrating a fifth example of theautomatic scanning control circuit, wherein the control circuit shown inFIG. 6A is arranged in combination with the control circuit shown inFIG. 10A to permit control in more finely divided steps.

FIG. 12A is a schematic illustration of another embodiment example ofthis invention as applied to a so-called range finder type focusdetecting device and particularly the basic arrangement of the opticalsystem thereof.

FIG. 12B is a circuit diagram illustrating the electrical circuitarrangement of the range finder type focus detecting device shown inFIG. 12A; and

FIG. 12C is a wave form chart showing the wave form of the output signalproduced from each circuit block in this focus detecting device when thefocus detecting device is in operation.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referrring to FIGS. 1A and 1B, the basic construction and the operationprinciple of a charge coupled device (hereinafter will be called "CCD"for short) are described below as a typical example of the electriccharge storing type photo-sensor arrays that are usable in practicingthis invention. CCD is a MOS capacitor type semiconductor device whichis basically composed of electrodes of aluminum or the like alignedthrough an insulator made of SiO₂ or the like on a semiconductor baseplate made of Si (silicon) and is caused to store electric charge bylight applied to its depletion layer which is produced when a voltage issupplied to the electrodes. Then, an electric field is applied so as tomove the stored charge by supplying different voltages on the otherelectrodes. The CCD performs combined functions including storingelectric charge in response to light, i.e. a light-to-electricconverting function and transferring the stored electric charge, i.e. aself-scanning function. The CCD is not only usable for detection of thebrightness of an image in time series by arranging it into an arrayedtype but also usable for secondary detection of shading distribution inan image.

In FIG. 1A, a reference numeral 1 denotes the CCD in its entirely; 2denotes a photo-sensor part in the CCD consisting of "n" number ofsensors 2_(l) through 2_(n). Reference numerals 3 and 3' denote transfergates which are disposed on both sides of the photo-sensor part 2 andwhich serve to transfer the electric charge stored in the photo-sensorpart 2 to transfer parts 5 and 5' when gate signals (start pulses (a)and (b) as shown in FIG. 1B) are supplied through the input terminals 4and 4'. When transfer signals (scanning pulses (c) and (d) as shown inFIG. 1B) are supplied to the input terminals 6, 6', 7 and 7' of thetransfer parts 5 and 5', electric charges in the transfer parts 5 and 5'are gradually transferred toward the output side thereof. Thus, theelectric charges of the sensors are gradually supplied to an output part8 with the electric charge of sensor disposed closer to the output sidefirst supplied and those of sensors disposed farther away from theoutput side supplied later. These electric charges are thus taken out asa time series signal (shown at (e) in FIG. 1B) from an output terminal 9connected to the output part 8. To effect the gradual transfer ofelectric charges one after another to the output side, there must beprovided a part that has no electric charge between one stage andanother arranged in each of these transfer parts 5 and 5'. And for thispurpose, the signals of the photo-sensor part 2 are divided into twochannels to transfer the signals in odd number order separately fromthose in even number order and then are combined at the output part 8.

The gates signals (start pulses) and the transfer signals (scanningpulses) which are required for driving the CCD 1, and the time seriatedoutput of the CCD 1 which are obtained from the transfer signals are asshown in FIG. 1B. In FIG. 1B, (a) and (b) respectively represent thegate signals (start pulses) to be supplied from the input terminals 4and 4' to transfer gates 3 and 3'; and (c) and (d) represent thetransfer signals (scanning pulses) to be supplied from the inputterminals 6, 7, 6' and 7' to the transfer parts 5 and 5'. Then, equalinterval signals produced during the period of transfer of the transfersignals correspond to the clock signals from the oscillator. Further,after a gate signal is produced, the number of the clock signals of theoscillator which correspond to the transfer signals is counted and thenext gate signal is produced when the count value reaches apredetermined value, which is greater than the number n of the sensors2_(l) -2_(n) included in the photo-sensor part 2. Then, the lightreceiving time, i.e. the electric charge storing time, of the sensors2_(l) -2_(n) at the photo-sensor part 2 is definitely dependent on thescanning recycle time duration corresponding to the cyclic interval atwhich the gate signals (a) and (b) are generated. On the other hand, thegenerating cycle of the gate signals (a) and (b) is dependent on thefrequency of the clock signals produced by the oscillator.

The wave form (e) represents a time series signal produced through theoutput part 8. The time series signal (e) is a composite signal composedof the electric charges which are transferred by the transfer signals(c) and (d) and are supplied into the output part 8 from the sensorsdisposed closer to the output side.

Accordingly with an image of an object formed on the light receivingface of the CCD 1, when the CCD 1 is driven by suppling the gate signals(a) and (b) and the transfer signals (c) and (d), signals each of whichcorresponds to the brightness of each corresponding minutes videoportion of the image are produced one after another by the CCD 1 andvideo signals of the image are thus obtained by scanning the image.

The operation principle of CCD is as described in the foregoing. BBD (abucket brigade device) also operates almost in the same manner as CCD.In the case of a photo-diode array which operates in a charge storingmode, the above stated scanning pulses are used as shift pulses for ashift register to cause the shift register to shift stepwise, one stepafter another, so that the output of each photo-diode can be taken outin a time serial manner with an analog switch which is connected to eachphoto-diode being operated on and off. The details of such arrangementare described in the Data Catalog of the Fairchild Co. "Self-ScannedLinear Photodiode Arrays, FPA 601/602", dated March 1971 and theoperation principle thereof will be explained hereinafter. Therefore,with BBD or such a photo-diode array used, video signals of an image canbe obtained by electrically scanning the image in the almost same manneras in the case of CCD.

The function of the photo-sensor array, such as CCD, BBD or photo-diodearray, being as described in the foregoing, the principle in the use ofthe photo-sensor array for a focus detecting device which performs focusdetection, for example, by detecting variation in the sharpness of animage will be understood from the following description with referencesmade in FIGS. 2-4.

First referring to FIG. 2 which illustrates the relation of an object toits image formed on a screen by a lens, a reference numeral 10 denotesan object having a certain shading pattern. An image forming lens 11 isused for forming an image 12 of the object 10 on a screen 13. Dependingon the position of the image forming lens 11, when the image 12 on thescreen 13 is out of focus, there is an area of intermediate brightnessbetween the brightest area and the darkest area in the image on thescreen 13 as shown in FIG. 3A. When the position of the image forminglens is adjusted along its optical axis to focus it on the screen 13,there is obtained on the screen 13 a sharp image 12 having a shadingpattern similar to the shading pattern of the object 10 as shown in FIG.4A.

Therefore, with the above stated photo-sensor array arranged in theposition of the screen 13, when the image is electrically scanned bymeans of the photo-sensor array, the video output obtained from thephoto-sensor array becomes as shown in the histogram (a) of FIG. 3B ifthe pattern of the image is as shown in FIG. 3A. Then, by passing thevideo output through a low pass filter or the like, the peak envelope ofthe signal as represented by a curve (b) in FIG. 3B is obtained.

On the other hand, when the pattern of the image 12 is as shown in FIG.4A, the video output obtained from the photo-sensor array becomes asrepresented by a histogram (a) in FIG. 4. Then, also by passing thevideo output through a low pass filter or the like, the peak envelope ofthe signal as represented by a curve (b) in FIG. 4B is obtained. Thepeak envelope curves (b) shown in FIGS. 3B and 4B are obtained byamplifying the signals with an amplifier after they have passed throughthe low pass filter.

As apparent from comparison of FIGS. 3B and 4B, when the image 12 formedon the photo-sensor array is sharp, the video output (a) representing itsuddenly changes at a boundary between light and dark pattern portionsas in the case of FIG. 4B. Accordingly, if a peak envelop signal (b) ofthe video output (a) is differentiated through a differentiationcircuit, the amplitude of the differentiation pulse reaches its maximumvalue when the image 12 is in a sharpest state. Then, the image 12 ofthe object 10 formed by the lens 11 on the screen 13 is in focus.

Now, referring to FIGS. 5A and 5B, an embodiment of the focus detectingdevice of the present invention which is based on the above statedoperation principle is described as follows:

In FIG. 5A, a reference numeral 14 denotes an image forming lens whichis adjustable along its optical axis O; 15 denotes a photo-sensor array,such as CCD or the like, which is disposed at a position to receive animage of an unillustrated object to be formed by the lens 14 and to befocused thereon; 16 denotes a driver circuit which is connected to theinput terminal of the sensor array 15 and which produces start pulses(FIG. 5B(b)) and scanning pulses (FIG. 5B(c)) to drive the sensor array15 by means of a clock signal (FIG. 5B(a)) supplied from the outside. Areference numeral 17 denotes a sample and hold circuit which is providedfor making the video output of the photo-sensor array 15 into a signal(FIG. 5B(e)) of a 100% duty factor because the video output is apulse-like signal (FIG. 5B(d) or FIG. 3B(a), or FIG. 4B(a)) of a 25-50%duty factor. The sample and hold circuit 17 converts the video outputfrom the sensor array into a signal of a 100% duty factor and producesthe converted signal as its output by taking in the output of eachsensor element of the photo-sensor array 15, in response to the scanningpulse driving the photo-sensor array, and holding the output of eachsensor element until the next scanning pulse is supplied. Further, inthe case of a photo-sensor array which is made up of a combination ofphoto-diodes and CCD, the video output which is obtained from such acombination is already a signal of a 100% duty factor and, therefore,the sample and hold circuit 17 is dispensable.

A reference numeral 18 denotes a low pass filter which is provided forobtaining a peak envelope of the output of the sample and hold circuit17 as shown in FIG. 5B(f); 19 denotes an amplifier for amplifying theoutput of the low pass filter 18; 20 denotes a differentiating circuitwhich is provided for the purpose of detecting the degree of imagesharpness by differentiating the output (FIG. 5B(g)) of the amplifiercircuit 19; and 21 denotes a peak hold circuit provided for holding thepeak value of the output (FIG. 5B(h)) of the differentiating circuit 20one after another, the peak value being held by a capacitor co disposedin the peak hold circuit 21. The low pass filter 18, amplifier 19,differentiating circuit 20 and peak hold circuit 21 are of knownconstructions, thereby they are shown in details in the drawings, anddetained description of them can be omitted here.

A reference numeral 22 denotes a switch which is provided with an analoggate for clearing the peak value (FIG. 5B(i)) being held by the peakhold circuit 21. The switch 22 is connected to the above stated peakholding capacitor co disposed in the peak hold circuit 21 and is turnedon when a signal is applied to its control terminal C. Then, with theswitch 22 turned on, the electric charge which is stored in thecapacitor is instantaneously discharged to thereby clear the peak valueheld by the peak hold circuit 21. A reference numeral 23 denotes a shiftregister which is provided for adjustment of timing for turning theswitch 22 on. The shift register 23 receives both the start pulse andthe scanning pulses for driving the photo-sensor array 15 and produces acontrol signal for turning the switch 22 on, when a predetermined numberof scanning pulses have been supplied after a start pulse is supplied,i.e. after a certain period of time τ following the generation of astart pulse (see FIG. 5B(i)). Then, in response to this control signal,the switch 22 is turned on and the peak hold circuit 21 is causedthereby to clear the peak value, which has been held therein, after aperiod of time τ delayed by the above stated shift register 23 followingthe generation of the start pulse (that is, at a point of time forcommencement of new scanning).

A reference numeral 24 denotes a sample and hold circuit for samplingand holding the output of the above stated peak hold circuit 21. Thesample and hold circuit 24 is set to take in the output of the peak holdcircuit 21 and to hold it there until the next start pulse is supplied.Accordingly, at the time of commencement of each scanning process, thepeak value which has been obtained through a preceding scanning processand which is retained in the peak hold circuit 21 before being clearedby the switch 22 is sampled and held in the sample and hold circuit 24.A reference numeral 25 denotes a meter connected to the output terminalof the sample and hold circuit 24 to indicate a focusing condition ofthe lens 14 to the object by the deflection of the pointer 25a of themeter 25.

A reference numeral 26 denotes an automatic scanning control circuitwhich is an essential part for the improvement of the present invention.The automatic scanning control circuit 26 detects the output of the lowpass filter 18 and serves to change scanning recycle time duration ifthe output of any one of the photo-sensor elements of the photo-sensorarray 15 comes to exceed a preset level which is set slightly lower thanthe saturation level of the photo-sensor elements. Then, by this, theeffective light receiving time of each photo-sensor element in thephoto-sensor array 15, i.e. the electric charge storing time which isdescribed in the foregoing, is shortened to prevent the electric chargestored in the photo-sensor elements from becoming saturated, so thatadequate video output can be always obtained. Further details of thisfunction will be described in the description of other embodimentexamples of this invention. Further, a reference numeral 26a denotes areset terminal. When a reset signal is supplied through this resetterminal 26a, the automatic scanning control circuit 26 is reset intoits original state.

With a focus detecting device arranged as described in the foregoing,and with the photo-sensor array 15 receiving an image of an objectformed by the lens 14 as shown in the drawings, when clock signals of apreset frequency as represented by (a) in FIG. 5B is supplied from theautomatic scanning control circuit 26 to the driver circuit 16, thedriver circuit 16 produces start pulses and scanning pulses asrepresented by (b) and (c) in FIG. 5B respectively and supplys them tothe photo-sensor array 15. Then, in response to each scanning pulse, thephoto-sensor array 15 puts out one after another in time series theelectric charge stored in each of the photo-sensor elements. The sampleand hold circuit 17 then responds to each scanning pulse to take in theoutput of each photo-sensor element and holds it until the next scanningpulse is supplied. In this manner, the video output as represented by(d) in FIG. 5B is converted into a signal of a 100% duty factor asrepresented by (e) in FIG. 5B. The converted signal is then supplied tothe low pass filter 18. Upon receipt of the signal from the sample andhold circuit 17, the low pass filter 18 obtains the peak envelope of thesignal as shown in FIG. 5B(f). The peak envelope is amplified by theamplifier 19 as shown in FIG. 5B(g) and then supplied to thedifferentiating circuit 20 for detection of the sharpness of the image.The differentiating circuit 20 then produces an output signal whichmakes a sudden change from positive to negative at a point where thechanging direction in the output of the amplifier 19 is reversed asshown in FIG. 5B(h); and the amplitude of the signal of thedifferentiating circuit 20 comes to correspond to the degree of theimage sharpness. The peak value to the output signal of thedifferentiating circuit 20 is held at the capacitor co in the peak holdcircuit 21. This, therefore, results in the output of the peak holdcircuit 21 as shown in FIG. 5B(i). A first scanning process is completedas described in the foregoing. At the end of the scanning process,however, the hold value held in the peak hold circuit 21 has not yetbeen taken in by the sample and hold circuit 24. The output of thesample and hold circuit 24, therefore, is zero and the pointer 25a ofthe meter 25 points a zero point.

At the beginning of the next scanning process, when a start pulse isproduced from the driver circuit 16, the sample and hold circuit 24responds to this to take in the hold value of the previous scanningprocess and thereby the output of the sample and hold circuit 24 becomesas shown in FIG. 5B(j). In response to this output, the pointer 25abegins to deflect to eventually indicate the degree of the sharpness ofthe image on the photo-sensor array 15.

On the other hand, after the above stated start pulse is produced, theshift register 23 produces a control signal and supplies it to theswitch 22 when a certain period of delay time τ has elapsed. Then, theswitch 22 turns on in response to the control signal and thereby causesthe capacitor co to discharge and clear the hold value of the abovestated peak hold circuit 21 (see FIG. 5B(i).

The video output of the photo-sensor array 15 is thus processed througheach scanning. The degree of the sharpness of the image on thephoto-sensor array 15 is indicated by the meter 25 each time scanning isaccomplished. In repeating such scanning process, when the lens 14 whichis in an out-of-focus position as shown by solid line in FIG. 5A isshifted in the direction of arrow A toward an in-focus position as shownby broken lines in FIG. 5A, the sharpness of the image is graduallyimproved. This in turn causes the video output of the photo-sensor array15 to gradually increase. Then, the output of the sample and holdcircuit 24 also gradually increases and the pointer 25a of the meter 25comes to show a greater degree of deflection. Therefore, the sharpestimage can be obtained on the photo-sensor array 15 by shifting the lens14 along its optical axis O while watching the deflection of the meter25 and by adjusting the lens 14 to a position where the pointer 25a ofthe meter 25 comes to deflect to a maximum degree. The lens 14 is thenset in its in-forcus position.

The foregoing description covers the operation of the device under anormal condition. However, as already mentioned, in an electric chargestoring type photo-sensor array, there is a limit to the amount ofelectric charge storable in each photo-sensor element constituting thephoto-sensor array and such a limit or a saturation level of electriccharge is predetermined. When such a saturation level is exceeded, anexcess of electric charge of one photo-sensor element comes to flow outand mixes in another element to present a so-called blooming phenomenon,which as well known, makes it hardly possible to obtain an adequatevideo signal.

Therefore, also in the case of the above described focus detectingdevice, if the electric charge storing time of each photo-sensor elementin fixedly set, the blooming phenomenon tends to occur making itimpossible to perform accurate focus detection when the device is usedfor a bright object.

On the other hand, as already described in connection with FIG. 1A andFIG. 1B, the electric charge storing time of each photo-sensor elementis dependent upon the scanning recycle time duration which correspondsto the start pulse generating cycle interval as shown in FIG. 5B(b).Meanwhile, the start pulse generating cycle is dependent on thefrequency of the clock signals (FIG. 5B(a)) which is produced by anoscillator and which corresponds to scanning pulses as shown in FIG.5B(c). Accordingly, the start pulse generating cycle can be adjusted bychanging the frequency of the clock signals; or by changing the relationof the start pulses to the scanning pulses, i.e. by changing the countnumber of clock signals for determining the start pulse generatingcycle. Then, through such change or adjustment, the electric chargestoring time of these photo-sensor elements is adjustable.

Therefore, with the video output of the photo-sensor array detected,when the output of any one of the sensor elements is found exceeding apreset level (which is set to be slightly lower than the saturationlevel of the photo-sensor elements), the electric charge storing time ofthe photo-sensor elements can be automatically shortened to preventgeneration of an erroneous signal either by increasing the frequency ofthe clock signals or by reducing the clock signal count number requiredfor determining the start pulse generating cycle. Such function isperformed by the automatic scanning control circuit 26 which is shown inFIG. 5A. Further details of this control circuit will be understood fromthe following description taken in connection with other drawings.

FIGS. 6A and 6B illustrate a first embodiment example of this automaticscanning control circuit. In FIG. 6A, a reference numeral 261 denotesthe automatic control circuit in its entirety; 27 denotes a referencevoltage setting circuit whereby a reference voltage V-ref-1 which isslightly lower than the saturation level of each photo-sensor element isset; 28 denotes a comparator which compares the output of the low passfilter 18 with the reference voltage V-ref-1 set by the referencesetting circuit 27, the comparator 28 being arranged to produce a "high"level signal as shown in FIG. 6B(g) when the output of the low passfilter 18 comes to exceed the reference voltage V-ref-1; 29 denotes a RStype flip-flop circuit which produces a "high" level signal from itsoutput terminal Q as shown in FIG. 6B(h); and 29a denotes a resetterminal of the flip-flop circuit 29. A reference numeral 30 denotes a Dtype flip-flop circuit which, after the "high" level signal is suppliedfrom the flip-flop circuit 29 thereto, produces a "high" level signalfrom its output terminal Q as shown in FIG. 6B(i) in synchronism withthe start pluse (FIG. 6B(b)) produced from the driver circuit 16. Areference numeral 31 denotes a frequency selection circuit whichcomprises: an oscillator 32 which generates clock signals of a presetfrequency f1, a counter or a frequency dividing circuit 33 which dividesthe clock signals generated by the oscillator 32 into a lower frequencyf2; an AND gate 34 which receives the output from the terminal Q of theflip-flop circuit 30 and which puts out the clock signals from theoscillator 32 when the output of the terminal Q becomes "high"; an ANDgate 35 which also receives the output of the flip-flop circuit 30through an inverter 36 and, when the output of the inverter 36 is"high", that is, when the output Q of the flip-flop circuit is "low",the AND gate 35 puts out the clock signals coming from the counter 33;and an OR gate 37 which supplies the outputs of these AND gates 34 and35 to the driver circuit 16.

With the automatic control circuit arranged as described in theforegoing, when during the scanning process on the image, any of theoutputs of photo-sensor elements in the photo-sensor array 15 does notexceed the reference voltage V-ref-1 set at the ref. voltage settingcircuit 27, the output of the comparator 28 is "low". Therefore, theoutputs Q (outputs from output terminals Q) of the flip-flop circuits 29and 30 are also "low" and the AND gate 34 remains off. Then, the "high"output of the inverter 36 causes the AND gate to be turned on. Thiscauses the AND gate 35 to puts out the output of the counter 33 which isclock signals of frequency f2; the clock signals of frequency f2 issupplied to the driver circuit 16; and scanning is performed at arelatively low speed which results in a longer start pulse generatingcycle interval and in turn allows each photo-sensor element to have along electric charge storing time.

Then, during the scanning process, when the output of the low passfilter 18 comes to exceed the reference voltage V-ref-1 as shown in FIG.6B(f), the output of the comparator 28 becomes "high" as shown in FIG.6B(g). In response to this, the output Q of the flip-flop circuit 29becomes "high" as shown in FIG. 6B(h). Then, at the beginning of thenext scanning process, the flip-flop circuit 30 which receives the"high" output of the flip-flop circuit 29 comes to produce a "high"output Q in response to the start pulse produced from the driver circuit16 as shown in FIG. 6B(i). This makes the output of the inverter 36"low" to turn off the AND gate 35 and, concurrently with this, to turnon the AND gate 34. Then, the OR gate 37 comes to put out the output ofthe oscillator 32, i.e. the clock signals of frequency f1 as shown inFIG. 6B(a). Then, as apparent from (c), (d) and (e) in FIG. 6B, thescanning speed increases and, accordingly, the start pulse generatingcycle interval, i.e. the scanning recycle time duration becomes shorterto make the electric charge storing time of the photo-sensor elementsshorter. Further, the shortening degree of the electric charge storingtime directly corresponds to the change in the frequency of the clocksignals. For example, the electric charge storing time is shortened to1/2 when the frequency is arranged to be f1=2×f2 and to 1/4 when thefrequency is arranged to be f1=4×f2.

With the automatic scanning control circuit 261 employed, therefore,when the focus detecting device is used for an unusally bright object,the frequency of the clock signals supplied to the driver circuit 16becomes higher to shorten thereby the scanning recycle time duration, orthe electric charge storing time of the photo-sensor elements, so thatthe electric charge stored in the sensor elements can be prevented fromreaching a saturation level. Further, in order to shift the frequency ofthe clock signals from f1 back to f2, a "high" signal is supplied to theresetting terminal 29a of the flip-flop circuit 29. In cases where thisfocus detecting device is incorporated in a photographic camera or thelike, such shifting of the flip-flop circuit 29 can be moreadvantageously accomplished through an interlocking arrangement with ashutter charging operation or the like. In addition to such, there isalso a method wherein the frequency of the clock signals isautomatically shifted back to the original frequency f2 when thebrightness of an object becomes darker. An embodiment example of such anarrangement will be described in detail hereinafter.

A second embodiment example of the automatic scanning control circuit ofthis invention uses a voltage-to-frequency converter (hereinafter willbe called V-F converter) as illustrated in FIG. 7. Referring now to FIG.7, a reference numeral 262 denotes the automatic scanning circuit in itsentirety; while the same reference numerals as those used in FIG. 6A toindicate circuit elements are also used in this drawing to indicate likeelements.

A reference numeral 31' denotes a clock frequency selection circuitwhich comprises: A V-F converter 38 which generates clock signals offrequency corresponding to a supplied voltage; a switch 39 whichreceives an output Q of a flip-flop circuit 30 and, when the output Qbecomes "high", turns on in response thereto to supply a voltage V1 setby a variable resister VR1 to the V-F converter 38 to cause theconverter to generate clock signals of frequency f1; and a switch 40,which receives also the output Q of the flip-flop circuit 30 through aninverter 36, and which, when the output of the inverter 36 is "high",that is, when the output Q of the flip-flop circuit 30 is "low", turnson in response thereto. Then, with the switch 40 turned on, a voltage V2which has been set by a variable resister VR2 is supplied to the V-Fconverter 38 to cause the converter 38 to generate clock signals offrequency f2 (V2<V1 and therefore f2<f1).

With arrangement as described above, if the output of the low passfilter 18 does not exceed the reference voltage V-ref-1 set at thereference voltage setting circuit 27, the output of the comparator 28remains "low". Therefore, the outputs Q of the flip-flop circuits are"low". The switch 39 remains in an off condition while the switch 40 isturned on to supply the voltage V2 to the V-F converter 38. This causesthe V-F converter 38 to supply the clock signals of frequency f2 to thedriver circuit 16. Thus the electric charge storing time of the sensorelements in the photo-sensor array becomes relatively long in the samemanner as in the preceding embodiment example.

If the output of the low pass filter comes to exceed the referencevoltage V-ref-1 as represented by (f) in FIG. 6B, the output of thecomparator becomes "high" as shown in FIG. 6B(g). In response to this,the output Q of the flip-flop circuit 29 becomes "high" as shown in FIG.6B(h). Then, at the commencement of the next scanning process, the startpulse which is produced from the driver circuit 16 causes the output Qof the flip-flop circuit 30 which receives the "high" output of theflip-flop circuit 29 to become "high" as shown in FIG. 6B(i). By this,the switch 40 is turned off and the switch 39 is turned on to supply thevoltage V1 to the V-F converter 38. Accordingly, the V-F converter comesto supply clock signals of frequency f1 to the driver circuit 16 to makethe scanning speed higher than before in the same manner as in thepreceding embodiment example (see FIGS. 6B(c), 6B(d) and 6B(e)). As aresult of that, the start pulse generating cycle or scanning recycletime duration becomes f2/f1 as shown in FIG. 6B(b) and the electriccharge storing time of photo-sensor elements becomes shorteraccordingly.

A third embodiment example of the automatic scanning control circuit ofthe present invention is as shown in FIG. 8 wherein: A reference numeral263 denotes the automatic scanning control circuit in its entiretyincluding a light measuring circuit 41 which comprises a light measuringphoto-diode 42, an operational amplifier 43 and a variable resistor VR3for sensitivity adjustments, and a V-F converter 38 which is similar tothe one employed in the preceding embodiment. The frequency of clocksignals produced from the V-F converter 38 is automatically adjustableaccording to an output voltage of the light measuring circuit 41.

Next, an example of an automatic resetting circuit which is applicableparticularly to the automatic scanning control circuits 261 and 262illustrated in FIGS. 6A and 7 for resetting such an automatic scanningcontrol circuit automatically back into its original condition isdescribed below with reference to FIGS. 9A and 9B.

In FIG. 9A, a reference numeral 44 denotes the automatic resettingcircuit in its entirety; and 45 denotes a peak hold circuit which holdsthe peak values of the output (FIG. 9B(e)) of the sample and holdcircuit 17 one after another and is arranged in a manner similar to thepeak hold circuit 21 shown in FIG. 5A. A reference numeral 46 denotes aswitch provided for the purpose of clearing the peak value (FIG. 9B(f))held by the peak hold circuit 45 in the same manner as in FIG. 5A. Inother words, when a certain delay time τ1 (in case of freq.=f1) or τ2(in case of freq.=f2) has elapsed after generation of a start pulse(FIG. 9B(b)), the switch 46 turns on in response to a control signalproduced from a shift register 47 to clear the hold value held at thepeak hold circuit 45. A reference numeral 48 denotes a sample and holdcircuit which samples and holds the output of the peak hold hold circuit45. In the same manner as the sample and hold circuit 24 shown in FIG.5A, the sample and hold circuit 48 responds to a start pulse produced bythe driver circuit 16 to take in the output of the peak hold circuit 45and holds it until the next start pulse is supplied. A reference numeral49 denotes a reference voltage setting circuit which set a referencevoltage V-ref-2 for determining a level at which the frequency of theclock signals to be supplied to the driver circuit 16 is reset from f1to f2 to bring the automatic scanning control circuit 261 or 262 backinto its original condition; and a numeral 50 denotes a comparator whichcompares the output (FIG. 9B(g)) of the sample and hold circuit 48 withthe reference voltage V-ref-2 set at the reference voltage settingcircuit 49 and which is arranged to produce and supply a "high" levelsignal or a reset signal (FIG. 9B(h)) to a reset terminal 29a of aflip-flop circuit 29 in the automatic scanning control circuit 261 or262 when the output of the sample and hold circuit 48 becomes lower thanthe reference voltage V-ref-2.

In such arrangement, if the hold value (FIG. 9B(f)) at the peak holdcircuit 45 is higher than the reference voltage V-ref-2 when thefrequency of the clock signals (FIG. 9B(a)) supplied from the automaticscanning control circuit 261 or 262 to the driver circuit 16 is f1 theoutput of the sample and hold circuit 48 (FIG. 9B(g)) is naturallyhigher than the reference voltage V-ref-2. Therefore, even if the sampleand hold circuit 48 takes in the output of the peak hold circuit 45 andsupplies it to the comparator 50 at the commencement of the nextscanning process, the output of the comparator 50 (FIG. 9B(h)) becomes"low" and the automatic scanning control circuit 261 or 262 is not resetthereby. However, if the hold value at the peak hold circuit 45 becomeslower than the reference voltage V-ref-2 as shown in FIG. 9B(f), theoutput of the comparator 50 becomes "high" as shown in FIG. 9B(h), whenthe sample and hold circuit 48 takes in the output of the peak holdcircuit 45, as shown in FIG. 9B(g), at the beginning of the nextscanning process and puts it out to the comparator 50. Then, in theautomatic scanning control circuit 261 or 262, the flip-flop circuit 29is immediately reset and its output Q becomes "low" as shown in FIG.9B(i). The flip-flop circuit 30 which receives the "low" level signalproduces a "low" level signal from its output terminal Q in response tothe start pulse applied at the beginning of the next scanning process.Then, in the case of the automatic scanning control circuit 261, the ANDgate 34 is turned off and, concurrently with this, the AND gate 35 isturned on, and in the case of the automatic scanning control circuit262, the switch 39 is then turned off and, concurrently with this, theswitch 40 is turned on; and, through such, the frequency of the clocksignals to be supplied to the driver circuit 16 is eventually shiftedfrom f1 back to its original frequency f2.

The foregoing description has covered the automatic scanning controlcircuit of this invention with examples wherein the start pulsegenerating time interval is changed by changing the frequency of clocksignals to be supplied to the driver circuit 16. However, it is alsopossible, as mentioned in the foregoing, to change the start pulsegenerating time interval without changing the frequency of the clocksignals. An example of such an arrangement is described hereunder as afourth embodiment example with reference to FIGS. 10A and 10B:

In FIG. 10A, a reference numeral 264 denotes an automatic scanningcontrol circuit in its entirety. In the drawing, the same referencenumerals as used to indicate circuit elements in FIGS. 6A and 7 are usedfor indicating circuit elements which are identical with those shown inFIGS. 6A and 7. A reference numeral 51 denotes an oscillator whichgenerates clock signals of frequency f as shown in FIG. 10B(a); and 52,53 and 54 denote counters which are connected in three stages forproducing reference clock pulses, as shown in FIG. 10B(f), which is usedfor defining start pulse generating timing, by dividing the frequency ofthe clock signals supplied from the oscillator 51. Of these counters,the counter 54 which is for counting a higher place is provided withfour input terminals A, B, C and D. Of these terminals, the threecontrol terminals B, C and D on the high place side are connected to theoutput terminal Q of the flip-flop circuit 29 and their count value isarranged to vary from N to N' (assuming that n<<N'<N, n being the totalnumber of photo-sensor elements contained in the photo-sensor array 15)in response to a "high" output of the flip-flop circuit 29. In otherwords, they are set to vary the generating timing of the above statedreference clock pulses. A reference symbol D denotes a diode; Tr denotesa transistor; and a numeral 16' denotes a driver circuit for driving thephoto-sensor array 15. In this particular example, the driver circuit16' is arranged in such a manner that while it produces scanning pulsesin response to the clock signals supplied from the oscillator 51, itproduces start pulses (FIG. 10B(b)) according to the reference clockpulses applied from the counter 54.

In such arrangement, when the output (FIG. 10B(c)) from the low passfilter 18 does not exceed the reference voltage V-ref-1 which is set atthe reference voltage setting circuit 27, the output (FIG. 10B(d) of thecomparator 28 is "low" and, accordingly, the output Q (FIG. 10B(e)) ofthe flip-flop circuit 29 is also "low". Therefore, a reference clockpulse (FIG. 10B(f)) is generated every time the count value of the clocksignals (FIG. 10B(a) supplied by the oscillator 51 becomes N. Then, thedriver circuit 16' produces start pulses (FIG. 10B(b)) according to thereference clock pulses supplied from the counter 54 while it producesthe scanning pulses according to the clock signals supplied from theoscillator 51. Therefore, the generating cycle interval of the startpulses is comparatively long and, accordingly, the electric chargestoring time of photo-sensor elements also becomes long.

On the other hand, when the output of the low pass filter 18 exceeds thereference voltage V-ref-1 as shown in FIG. 10B(c), the output of thecomparator 28 becomes "high" as shown in FIG. 10B(d). In response tothis, the output Q of the flip-flop circuit 29 becomes "high" as shownin FIG. 10B(e). This causes the three control terminals B, C and D onthe higher place side of the counter 54 to become "high" and thecountable value of the counter is reduced from N to N'. Then, asunderstood from the FIG. 10B(a) and 10B(f), every time the count valueof the clock signals supplied from the oscillator 51 becomes N', areference clock pulse is produced from the counter 54. Accordingly, asshown in FIG. 10B(b), the start pulse generating cycle interval of thedriver circuit 16' becomes N'/N while the frequency of the scanningpulses remains unchanged, and the electric charge storing time of thephoto-sensor elements is shortened. Then, the electric charge storingtime shortened to 1/2 if N' =1/2N and to 1/4 if N'=1/4N. In this manner,the shortening degree of the electric charge storing time directlycorresponds to the ratio in which the total count value of the counters52, 53 and 54 is changed. Further, the count values of the counters 52,53 and 54 are adjustable as desired by selecting their input terminalsto which the output Q of the flip-flop circuit 29 is to be supplied.Therefore, it will be advantageous to provide an arrangement forallowing manual selection of such input terminals from the outside.

Now, while scanning is performed under a condition in which the countvalue of the counters 52, 53 and 54 is shifted from N to N', when theoutput of the sample and hold circuit 48 in the automatic reset circuit44 shown in FIG. 9A becomes lower than the reference voltage V-ref-2 setat the reference voltage setting circuit 49 as shown in FIG. 10B(g), theoutput of the comparator 50 becomes "high" as shown in FIG. 10B(h) inresponse thereto. Accordingly, the flip-flop circuit 29 is reset and itsoutput Q becomes "low" as shown in FIG. 10B(e), so that the countablevalue of the counter 54 can be immediately shifted from N' back to itsoriginal value N.

In accordance with the automatic scanning control circuit 264illustrated in FIG. 9A, the start pulse generating cycle interval, i.e.scanning recycle time duration, can be changed without changing thefrequency of the clock signals and, accordingly, without changing thefrequency of the scanning pulses as described in the foregoing.

A fifth embodiment example of the automatic scanning control circuit ofthis invention is described below with reference to FIG. 11.

In FIG. 11, a reference numeral 265 denotes an automatic scanningcontrol circuit in its entirety, which represents a combination of theautomatic scanning control circuit 261 shown in FIG. 6A and anotherautomatic scanning control circuit 264 which is shown in FIG. 10A. Inthis example, the number of the scanning recycle time duration shiftingsteps is further divided into smaller steps. In FIG. 11, the samereference numerals as used in FIG. 6A and FIG. 10A for indicatingcircuit elements are also used for indicating circuit elements which areindentical with those of the drawings cited above. A reference numeral28' denotes a comparator which is identical with the comparator 28 andis arranged to receive a reference voltage V-ref-1 at its (-) inputterminal and to receive at its (+) input terminal the output of a lowpass filter 18 through an analog gate 55 only when the output Q of theflip-flop circuit 30 is "high", that is, only when the frequency of theclock signals has been shifted from f2 to f1. A reference numeral 29'denotes a RS type flip-flop circuit which is identical with theflip-flop circuit 29 and its output terminal Q is connected to thehigher place control terminals B, C and D of the counter 54. In thisparticular example, the counters 52, 53 and 54 count the clock signalssupplied through the OR gate 37 and produce the above stated referenceclock pulses. Further, the AND gate 35 which is provided for shiftingclock signal frequency is arranged to receive the output Q of theflip-flop circuit 30. The rest of the arrangement is exactly the same asthe preceding embodiments. Reference numerals 44 and 44' denoteautomatic reset circuit which are similar to the one shown in FIG. 9A.The first automatic reset circuit 44 is provided for resetting theflip-flop circuit 29, i.e. for shifting the frequency of the clocksignals from f2 to f1. The second automatic reset circuit 44' isprovided for resetting the flip-flop circuit 29', i.e. for shifting thecountable value of the counters 52 through 54 from N' to N. The secondautomatic reset circuit 44' is so arranged that the output of the sampleand hold circuit 17 is supplied to the second automatic resettingcircuit 44' through an analog gate 56 only when the output of the firstautomatic resetting circuit 44 is "high".

As apparent from the foregoing, in this automatic scanning controlcircuit 265, if the output of the low pass filter 18 does not exceed thereference voltage V-ref-1, the driver circuit 16' is supplied with theclock signals of frequency f2 (see FIG. 6B(a)) and the reference clockpulses which is produced by the counter 54 at every N number of theclock signals (see FIG. 10B(f)). Accordingly, scanning recycle timeduration becomes the longest. While scanning is repeated under such acondition, if the output of the low pass filter 18 comes to exceed thereference voltage V-ref-1 as shown in FIG. 6B(f), the frequency of theclock signals is shifted from f2 to f1 at the time when the nextscanning process begins as shown in FIG. 6B(a) and, accordingly, thescanning recycle time duration becomes shorter. And then since theoutput Q of the flip-flop circuit 30 becomes "high", the analog gate 55is turned on to cause the output of the low pass filter 18 to besupplied to the positive input side of the comparator 28'.

Therefore, while scanning is repeated under the condition where thefrequency of the clock signals is f1 and the countable value of thecounter 52 through 54 is N, if the output of the low pass filter 18further comes to exceed the reference voltage V-ref-1, the countablevalue of the counter 52 through 54 is immediately shifted from N to N';therefore the counter 54 produces the reference clock pulses at every N'number of the clock signals as shown in FIG. 10B(a) and 10B(f); andeventually the scanning recycle time duration becomes the shortest.

On the other hand, while scanning is repeated under the condition wherethe frequency of the clock signals is f1 and the countable value of thecounters 52 through 54 is N', if the peak value of the output of thesample and hold circuit 17 becomes lower than the reference voltageV-ref-2 as shown in FIG. 9B(g), a "high" signal (a reset signal--FIG.9B(h)) is supplied from the first automatic resetting circuit 44 to thereset terminal 29a of the flip-flop circuit 29 to reset the flip-flopcircuit 29 (FIG. 9B(i)). Accordingly, while the countable value of thecounters 52 through 54 remains to be N', the frequency of the clocksignals comes to be shifted from f1 back to the original frequency f2 atthe beginning of the next scanning.

Further, since the analog gate 56 turns on under such a condition, theoutput of the sample and hold circuit 17 comes to be supplied to thesecond automatic resetting circuit 44'.

Accordingly, while scanning is repeated under the condition where thefrequency of the clock signals is f2 and the countable value of thecounters 52 through 54 is N', if the peak value of the output of thesample and hold circuit 17 becomes to be more lower than the referencevoltage V-ref-2 as shown in FIG. 10B(g), a "high" signal (a resetsignal--FIG. 10B(h)) is supplied from the second automatic resettingcircuit 44' to the reset terminal 29'a of the flip-flop circuit 29' toreset the flip-flop circuit 29' as shown in FIG. 10B(e). Accordingly,the countable value of the counters 52 through 54 is shifted from N' tothe original value of N; and the automatic scanning control circuit 265is reset back to its original condition wherein the frequency of theclock signals is f2 and the countable value of the counters 52 through54 is N.

While scanning is repeated with the frequency of the clock signals beingf1 and the countable value of the counters 52 through 54 being N, if areset signal is produced from the automatic resetting circuit 44, thefrequency of the clock signals comes to be again shifted from f1 back tof2.

It is possible to use only one auto-reset circuit and to simultaneouslyreset the flip-flop circuits 29 and 29' when the peak value of theoutput of the sample and hold circuit 17 becomes lower than thereference voltage V-ref-2 in such a way as to shift the frequency of theclock signals from f1 to f2 and the countable value of the counters 52through 54 from N' to N. However, the arrangement to use two automaticresetting circuits, one for each of the flip-flop circuits 29 and 29' asshown in FIG. 11 is advantageous in the following respect:

In the embodiment example illustrated in FIG. 11, the combination of theautomatic resetting circuits 44 and 44' for the automatic scanningcontrol circuit 265 permits to have four different modes including

(a) clock signal frequency is f2, and countable value of counters 52through 54 is N

(b) clock signal frequency is f1, and countable value of counters 52through 54 is N

(c) clock signal frequency is f2, and countable value of counters 52through 54 is N'

(d) clock signal frequency is f1, and countable value of counters 52through 54 is N'.

Therefore, assuming the f1=2f2 and N'=1/4N, and that the scanningrecycle time duration in the mode (a) is T, the scanning recycle timeduration in other modes (b)-(d) are obtained as follows: For the mode(b), f2/f1T=1/2T; for mode (c), N+/NT=1/4T; and for mode (d),f2/f1·N'/NT=1/8T. Thus, in accordance with this embodiment example, 4different scanning recycle time durations are obtainable to permit fineradjustment of the electric charge storing time.

In the last place, FIGS. 12A-12C illustrate another embodiment of thefocus detecting device of this invention. In this embodiment, the deviceis arranged to be of a range finer type as described below:

In FIG. 12A which illustrates the optical system arrangement of thefocus detecting device, a reference numeral 57 denotes an object onwhich focus is to be made; 58 denotes a reflecting mirror which isstationarily disposed at an angle of about 45 degrees to reflect thelight of the object at about a right angle; 59 denotes a first imageforming lens which is stationarily disposed to receive the lightdeflected by the mirror 58 to form an image of the object on apredetermined image forming plane; 60 denotes a movable reflectingmirror which is disposed at a predetermined base length l away from thestationary mirror 58 to be rotatable on its shaft 60a; and 61 denotes asecond image forming lens which receives light from the movablereflecting mirror 60 to form an image of the object 57 on apredetermined image forming plane and which is stationarily disposed tohave its optical axis coincide with that of the first lens 59. In therear of the first lens 59, there is fixedly disposed a firstphoto-sensor array 15 with its light receiving surface arranged tocoincide with the image forming plane of the first lens 59 and with thecenter of its light receiving surface arranged to coincide with theoptical axis of the lens 59. Then, a second photo-sensor array 15' whichis of the same construction as the first photo-sensor array 15 isdisposed in the rear of the second lens 61 with its light receivingsurface and the center of the light receiving surface arranged tocoincide respectively with the image forming plane and optical axis ofthe second lens 61. These two sensor arrays 15 and 15' are fixedlydisposed back to back with each other.

In this arrangement with the movable mirror 60 set aslant at an angle ofabout 45 degrees symmetrically with the fixed mirror 58, when a sightingsystem consisting of the mirror 58, the first lens 59 and the firstphoto-sensor array is aligned to the object 57, an image of the object57 formed by the first lens 59 is located about the central part of thelight receiving surface of the first photo-sensor array 15 as shown inFIG. 12A. On the other hand, in a detecting system consisting of themovable mirror 60, the second lens 61 and the second photo-sensor array15', an image of the object 57 formed by the second lens 61 is locatedon the light receiving surface of the second photo-sensor array 15' at aposition with relative positional deviation with respect to the positionof the image on the light receiving surface of the first photo-sensorarray 15, corresponding to distance d to the object 57.

Under such a condition, when the video outputs of the first and secondphoto-sensor arrays 15 and 15' obtained by driving them in synchronismare compared with each other, the video output of the secondphoto-sensor array 15' comes to deviate in its phase to a degreecorrespondence to the distance d to the object 57 with respect to thephase of the video output of the first photo-sensor array 15.

Therefore, the distance d to the object 57 can be found by obtaining thedegree of phase difference between the video outputs of the first andsecond photo-sensor arrays 15 and 15'.

In another method of detecting the distance d to the object 57, thevideo output of the second photo-sensor array 15' is compared with thevideo output of the first photo-sensor array 15; and the movable mirror60 is rotated from its about 45 degree slanting position around itsshaft 60a in the direction of the arrow B shown in the drawing until thevideo outputs of the two photo-sensor arrays 15 and 15' come to coincidewith each other; then the distance d to the object 57 can be obtainedfrom the rotating amount of the mirror 60.

In such a case, an image forming optical system which is shiftable alongits optical axis is arranged in an operative relation to the abovestated movable mirror 61 in such a manner that the optical system iscorrectly focused to the object 57 when the video outputs of thesephoto-sensor arrays 15 and 15' come to coincide with each other. In thismanner, the focusing condition of the optical system can be readilydetected by comparing the two video outputs.

Referring now to FIGS. 12B and 12C, an example of electrical circuitarrangement which is suitable for use in combination with the opticalsystem shown in FIG. 12A is described below:

In FIG. 12B, the circuit elements that are indicated by the samereference numerals as in FIGS. 5A and 11 are identical with those shownin the preceding embodiments. Therefore, detailed description of theseelements is omitted here.

A reference numeral 17' denotes a second sample and hold circuit whichis provided for converting the video output of the second photo-sensorarray 15' into a signal of 100% duty factor. The second sample and holdcircuit 17' is identical with the first sample and hold circuit 17. Areference numeral 18' denotes a second low pass filter which is providedfor the purpose of obtaining a peak envelope of the output of the secondsample and hold circuit 17' (FIG. 12C(c)) and is identical with thefirst low pass filter 18. Numeral 62 denotes a differential amplifierprovided for obtaining difference between the outputs of the first andsecond low pass filter 18 and 18' (FIG. 12C(d); and 63 denotes anabsolutizing circuit provided for converting the output of thedifferential amplifier 62 into an absolute value (FIG. 12C(e). As shownin the drawing, the absolutizing circuit 63 comprises in combination acircuit portion which includes a first diode D1 and a first operationalamplifier OA1 and operates in response to a positive input signal andanother circuit portion which includes a second diode D2 and a secondoperational amplifier OA2, and operates in response to a negative inputsignal. The absolutizing circuit 63 produces a positive signalirrespective as to whether the output of the differential amplifier 62is positive or negative. A reference numeral 64 denotes an integratingcircuit which is provided for integrating the output of the absolutizingcircuit 63. Its integrating value is held by the capacitor co' providedin therein until the switch 22 is turned on, i.e. until a delay time τset by the shift register 23 elapses after a start pulse is generated asmentioned in the foregoing (see FIG. 12C(f)).

The sample and hold circuit 24 is arranged to take in, in response tothe start pulse, the integrated value of the integrating circuit 64 fromthe capacitor co' before it is cleared and to supply the integratedvalue to the meter 25.

In this embodiment, an automatic scanning control circuit which isidentical with the one shown in FIG. 11 is employed without anymodification.

With the arrangement described in the foregoing being set in a conditionas shown in FIG. 12A wherein the position of an image on the secondphoto-sensor array 15' is deviating with respect to the position of animage on the first photo-sensor array 15 to a degree corresponding todistance d to the object 57, when the start pulses (FIG. 12C(a)) and thescanning pulses are supplied from the driver circuit 16' to the firstand second photo-sensor arrays 15 and 15' to simultaneously drive them,the output of the second photo-sensor array 15' has a phase differencefrom the video output of the first photo-sensor array 15 to a degreecorresponding to the above stated relative deviation in the imageforming positions. Accordingly, when the peak envelopes of these outputsare obtained through low pass filter 18 and 18' after they have beensampled and held by the sample and hold circuits 17 and 17', the phaseof the output of the low pass filter 18' differs by Δ1 from that of theoutput of the low pass filter 18 as understood from FIGS. 12C(b) and12C(c). The difference between the outputs of the low pass filters 18and 18' is obtained through the differential amplifier 62 as shown inFIG. 12C(d). When the difference obtained through the amplifier 62 isconverted into an absolute value through the absolutizing circuit 63,the result is as shown in FIG. 12C(e). Therefore, while scanning isbeing carried out, when the outputs of the absolutizing circuit 63 isintegrated one after another by the integrating circuit 64, theintegrated value thus obtained becomes as shown in FIG. 12C(f). Then, atthe beginning of next scanning, this is taken in by the sample and holdcircuit 24 in synchronism with a start pulse. Accordingly, the pointer25a of the meter 25 comes to show a great deflection as shown by a fullline in FIG. 12B. This indicates that an unillustrated optical system isout of focus.

Therefore, while watching the meter 25, when the optical system isshifted alongs its optical axis in such a way as to rotate the mirror 60in the direction of arrow B shown in FIG. 12A, this causes the relativedeviation of the image positions on the two photo-sensor arrays 15 and15' to gradually decrease. Accordingly, the phase difference between theoutputs of the low pass filters 18 and 18' also comes to decrease toΔ2(<Δ1), as shown in FIG. 12C(b) and 12C(c). Then, the output of theintegrating circuit 64 which is taken in by the sample and hold circuit24 also gradually decreases and the pointer 25a of the meter 25 comes todeflect to a lesser degree. Then, while the mirror 60 is rotating, whenthe relative positions of images on the photo-sensor arrays 15 and 15'comes to coincide with each other, the phase difference Δ between theoutputs of the low pass filters 18 and 18' becomes zero as shown inFIGS. 12C(b) and 12C(c). Accordingly, when the next start pulse isgenerated, the signal to be taken in by the sample and hold circuit 24becomes zero and the pointer 25a of the meter 25 comes to a zero pointas shown by a broken line in FIG. 12B thus to indicate that the opticalsystem has reached an in-focus position. The optical system, therefore,can be correctly focused to the object 57 by shifting the optical systemalong its optical axis while watching the meter 25 till the pointer 25acomes to indicate a zero point.

Now, while the scanning process is repeated, if the output of the lowpass filter 18 comes to exceed the reference voltage V-ref-1 which isset at the automatic scanning control circuit 265, the control circuit265 works firstly to shift the frequency of clock signals to be suppliedto the driver circuit 16' from f2 to f1; and scanning recycle timeduration is shortened to f2/f1.

And further, despite of such shifting, if the output of the low passfilter 18 still exceeds the reference voltage V-ref-1, the generatingcycle interval of the reference clock pulses to be supplied to thedriver circuit 16' is shortened from f1·N to f1·N' and the scanningrecycle time duration is further shortened to N'/N.

Where the scanning recycle time duration is f2/f1·N'/N, if the peakvalue of the output of the sample and hold circuit 17 becomes lower thanthe reference voltage V-ref-2 which is set at the first automatic resetcircuit 44, the first automatic resetting circuit 44 causes thefrequency of the clock signals to be supplied to the driver circuit 16'to shift from f1 to the original frequency f2. If, despite of suchshifting, the peak value of the output of the sample and hold circuit 17still becomes lower than the reference voltage V-ref-2, the secondautomatic resetting circuit 44 comes to work and the generating cycleinterval of the reference clock pulses to be supplied to the drivercircuit 16' is shifted from f2·N' to the original cycle interval f2·N.

Of course, under the condition with the frequency of the clock signalshaving been shifted from f2 to f1, if the peak value of the output ofthe sample and hold circuit 17 becomes lower than the reference voltageV-ref-a, the first automatic resetting circuit works to bring thefrequency from f1 back to the original frequency f2.

The electric charge storing time of the photo-sensor elements in thephoto-sensor arrays 15 and 15' is thus automatically adjusted.

In all of the embodiments of this invention described in the foregoing,the CCD (charge coupled device) as shown in FIG. 1A or the BBD (bucketbrigade device) that operates in about the same manner as the CCD isemployed as photo-sensor array. Then, for the sake of reference, theforegoing description is supplemented with the following description ofanother embodiment wherein a photo-diode array which operates in anelectric charge storing mode is employed as photo-sensor array insteadof the CCD or BBD:

As mentioned in connection with the description of FIGS. 1A and 1B incase the photo-diode array which operate in an electric charge storingmode, the scanning pulses supplied from the driver circuit is used asshift pulses of a shift register. The shift register is shifted step bystep with each scanning pulse to operate each analog switch connected toeach photo-diode in such a way as to take out, in time series, anelectric signal which corresponds to the electric charge to be stored ateach photo-diode. However, the operating mode of the photo-diode arraysomewhat differs from the CCD or BBD as described below:

When one of the analog switches is caused to turn on by the shiftingoperation of the shift register that takes place in response to ascanning pulse, an electric charge current flows from an electriccharging circuit to a photo-diode which is connected to the analogswitch to charge the photo-diode to a full extent, or until the capacityof the photo-diode comes to be saturated with the charge. Then, whenthis analog switch is turned off by shifting operation of the shiftregister, an amount of electric charge in the photo-diode correspondingto an integrated amount of light incident on the photo-diode (anintensity of light×length of incident time) is discharged, so that theelectric charge stored in the photo-diode is decreased corresponding tothe integrated amount of the incident light. Then, in next scanning,when this analog switch is again turned on, again the charge currentflows from the charging circuit to the photo-diode to replenish it withan amount of electric charge corresponding to the amount decreasedaccording to the integrated amount of the incident light. Therefore, theamount of the charging current then comes to correspond to theintegrated amount of the light incident upon this photo-diode, and thischarging current becomes a video signal.

In other words, in the case of the photo-diode array, the electriccharge in each photo-diode is first discharged when light is appliedthereto; and, when each of the photo-diodes is recharged, the chargingcurrent flowing to the diode is obtained as video signal. In this case,however, the capacity of each photo-diode is of course predetermined.Therefore, the photo-diode array must be used within a range of theintegrated light amount determined in relation to such capacity.

For example, when the integrated amount of light incident upon aspecific photo-diode comes to exceed a level of such an integrated lightamount determined in relation to the capacity of the photo-diode, thewhole electric charge with which the photo-diode has been fully chargedto its capacity or its saturation level is discharged thereby. However,there never takes place any further discharge because the diode isdepleted. Therefore, the electric current which flows to the photo-diodefor next charging corresponds to the capacity of the photo-diode anddoes not correspond to the integrated amount of the light incident uponthe photo-diode, so that a correct video signal can not be obtained fromsuch arrangement.

Therefore, in the case of the photo-diode array also, the scanningrecycle time duration (which is to be regarded as electric chargedischarging time of each photo-diode element in the case of aphoto-diode array) must be adjusted to the brightness of an object.Whereas, in accordance with this invention, the provision of theautomatic scanning control circuit which is described in the foregoingas a main point of this invention makes it possible to obtain exactlythe same advantageous effect as in the preceding examples of embodimentsof this invention even when it is used in combination with such aphoto-diode array of the type operating in an electric charge storingmode.

As described in detail in the foregoing, in accordance with thisinvention, in carrying out focus detection with one or more photo-sensorarrays which are of an electric charge storing type or which operate inan electric charge storing mode, the scanning recycle time duration ofthe array or arrays can be automatically adjusted in accordance with thebrightness of an object. In accordance with this invention, generationof erroneous signals can be prevented even in cases of an unusuallybright object wherein an erroneous signal tends to be produced as theintegrated amount of light incident upon each photo-sensor element comesto exceed an allowable integrated light amount determined according tothe capacity of the photo-sensor element; and, in cases of a darkobject, a S/N ratio can be prevented from becoming excessively poor dueto extreme attenuation of an output signal of the photo-sensor element.Thus, adequate video outputs can be always obtained irrespective ofvariation in the brightness of the object, so that very accurate focusdetection can be accomplished for any object. It is particularlyadvantageous to use photo-sensor array or photo-sensor arrays which areof an electric charge storing type or which operate in an electriccharge storing mode.

Now, with the exception of the embodiment illustrated in FIG. 8, in allother examples of the automatic scanning control circuit, the control isperformed by detecting the output of the low pass filter 18. However, asconceptionally shown with broken lines in the drawings, such controlalso may be of course performed either by detecting the output of thesample and hold circuit 17 or by directly detecting the output of thephoto-sensor array 15.

In the same way, the automatic reset circuit may also be operated bydirectly detecting the output of the photo-sensor array 15, instead ofdetecting the output of the sample and hold circuit 17, asconceptionally shown with broken lines in the accompanying drawings.

In the case of the example of the automatic scanning control circuitshown in FIGS. 6A and 7, the frequency of the clock signals to besupplied to the driver circuit 16 is shifted between f2 and f1 while, inthe case of the example of automatic scanning control circuit shown inFIG. 10A, the countable value at the counters 52 through 54 is arrangedto be shiftable between N and N', however, such shifting arrangementsmay easily be modified from the circuits of the examples to perform suchshifting between a greater number of shifting steps.

What is claimed is:
 1. A focus detecting device for detecting thefocusing of an image forming optical system on an object, said opticalsystem having an optical axis and being adjustable along the axis so asto form an image of the object on a predetermined focusing plane, saiddevice comprising:(A) photo-sensor array means having a plurality ofelectric charge storing type photo-sensor elements, said array meansbeing disposed at a position substantially corresponding to saidfocusing plane; (B) driver circuit means for electrically driving saidphoto-sensor array means, said driver circuit means being electricallycoupled to the array means to provide the array means with intermittentstart pulses at cyclical intervals and intermittent scanning pulses andfor causing the array means to produce, one after another in timeseries, outputs of electric charge stored in each photo-sensor elementduring a period of time corresponding to the cyclical interval of saidstart pulses; the electric charge being stored in each photo-sensorelement corresponding to the brightness of the portion of the imageappearing at the photo-sensor element within said period of time; (C)signal processing circuit means for processing the output signal of saidphoto-sensor array means, said processing circuit means beingelectrically coupled to the array means to provide an electrical outputrepresentative of the focusing condition of the optical system relativeto the object, on the basis of said output signals of the array means;(D) control circuit means for adjusting the scanning recycle timeduration in correspondence to the brightness of the object, said controlcircuit being electrically coupled to said driver circuit means toaccomplish the adjustment of the scanning recycle time duration byadjusting the cyclical interval of said start pulses to be applied tosaid array means in correspondence to the brightness of the object; and(E) said control circuit means including means for detecting thebrightness of at least a portion of the image appearing at thephoto-sensor array means within a period of time, means for establishinga range of reference values and control means for adjusting the scanningrecycle time duration in response to said detecting means detecting thatthe instantaneous brightness of at least a portion of the imageappearing at the photo-sensor array means deviates from thepredetermined range of reference values.
 2. A device according to claim1, wherein said control circuit means comprises:first electrical circuitmeans electrically coupled to said driver circuit means for providingthe driver circuit means with intermittent base clock pulses, saiddriver means being arranged to generate said scanning pulses and saidstart pulses on the basis of said base clock pulses supplied from thefirst circuit means; and second electric circuit means electricallycoupled to said first circuit means to control the cyclical interval ofsaid base clock pulses to be supplied from said first circuit means tosaid driver circuit means in accordance with the brightness of theobject, the cyclical interval of the start pulses to be generated bysaid driver circuit means thus being adjustable in correspondence withthe brightness of the object by adjusting the cyclical interval of thebase clock pulses to be supplied to said driver circuit incorrespondence with the object brightness.
 3. A device according toclaim 2, wherein(a) said first electrical circuit means includes:a baseclock pulse generating circuit which is capable of generating at leastfirst intermittent base clock pulses having a first cyclical intervaland second intermittent base clock pulses having a second cylcicalinterval longer than the cyclical interval of the first base clockpulses; and a selection circuit for selectively supplying at least saidfirst base clock pulses or said second base clock pulses to said drivercircuit means, said selection circuit being electrically coupled to saidbase clock pulse generating circuit and to said driver circuit means;and wherein (b) said second electrical circuit includes:a controlcircuit for controlling said selection circuit in correspondance withthe brightness of the object, said control circuit being electricallycoupled to said selection circuit to control the selection circuit incorrespondence with the object brightness for selection of the baseclock pulses to be supplied to said driver circuit means.
 4. A deviceaccording to claim 3, wherein said control circuit includes:comparatormeans for comparing the level of the output signal of said photo-sensorarray means or a signal level which is substantially equivalent theretowith the level of a predetermined reference signal, said comparatormeans producing a predetermined output signal when the level of saidsignal exceeds the level of said reference signal, and wherein saidselection circuit is electrically coupled to said comparator means tochange the base clock pulses to be supplied to said driver circuit meansfrom said second base clock pulses to said first base clock pulses inresponse to the output signal of said comparator means.
 5. A deviceaccording to claim 4, wherein said base clock pulse generating circuitincludes:oscillator means for providing said first intermittent baseclock pulses; and frequency dividing means for providing said secondintermittent base clock pulses by frequency dividing said first baseclock pulses, the frequency dividing means being electrically coupled tosaid oscillator means, and wherein said selection circuit iselectrically coupled to both of said oscillator means and said frequencydividing means to change the base clock pulses to be supplied to saiddriver circuit means from the second base clock pulses provided by thefrequency dividing means to the first base clock pulses provided by saidoscillator means in response to the output signal of said comparatormeans.
 6. A device according to claim 4, wherein said comparator meansis electrically coupled to a part of said signal processing circuitmeans to compare the level of a signal which is substantially equivalentto the output signal of said photo-sensor array means with the level ofsaid reference signal.
 7. A device according to claim 4, wherein saidcomparator means is electrically coupled to said photo-sensor arraymeans to compare the level of the output signal of the array means withthe level of said reference signal.
 8. A device according to claim 3,wherein said control circuit includes:first comparator means forcomparing the level of the output signal of said photo-sensor arraymeans or that of a signal substantially equivalent thereto with thelevel of a first predetermined reference signal, the first comparatormeans producing a first predetermined output signal when the level ofthe output signal of the photo-sensor array means exceeds the level ofthe first reference signal; and second comparator means for comparingthe peak value of the output signal of said photo-sensor array means orthe peak value of a signal substantially equivalent thereto with thelevel of a second predetermined reference signal having a lower levelthan said first reference signal, the second comparator means producinga second predetermined output signal when the peak value of said outputsignal of the photo-sensor array means falls below the level of saidsecond reference signal, and wherein said selection circuit iselectrically coupled to said first and second comparator means to changethe base clock pulses to be supplied to said driver circuit means fromsaid second base clock pulses to the first base clock pulses in responseto said first output signal of the first comparator means and to changethe base clock pulses from the first base clock pulses to the secondbase clock pulses in response to said second output signal of the secondcomparator means.
 9. A device according to claim 2, wherein said secondelectrical circuit means includes:a comparator circuit for comparing thelevel of the output signal of said photo-sensor array means or that of asignal substantially equivalent thereto with the level of apredetermined reference signal, the comparator circuit producing apredetermined output signal when the level of the output signal exceedsthe level of said reference signal; and selection circuit for changingthe generating cycle interval of the base clock pulses to be suppliedfrom said first electrical circuit means to said driver circuit meansbetween at least a first cyclical interval and a second cyclicalinterval which is longer than the first cyclical interval, saidselection circuit being electrically coupled to said first electricalcircuit means and to said comparator circuit to change the cyclicalinterval of the base clock pulses to be generated by the first circuitmeans from the second cyclical interval in response to the output signalof said comparator circuit.
 10. A device according to claim 9, whereinsaid first electrical circuit means includes:a base clock pulsegenerating circuit which generates base clock pulses at intervals inaccordance with input voltage; and wherein said selection circuit iselectrically coupled to said base clock pulse generating circuit tochange the input voltage to the base clock pulse generating circuit froma second voltage value required for obtaining said second cyclicalinterval to a first voltage value required for obtaining said firstcyclical interval in response to the output signal of said comparatorcircuit.
 11. A device according to claim 10, wherein said selectioncircuit includes:first voltage setting means for setting said firstvoltage value; second voltage setting means for setting said secondvoltage value; and selecting means for selectively supplying thevoltages with said first or second voltage value to said base clockpulse generating circuit, said selecting means being electricallycoupled to said generating circuit, to said comparator circuit and tosaid first and second voltage setting means to change the voltage to besupplied to said base clock pulse generating circuit from the secondvoltage value to the first voltage value.
 12. A device according toclaim 9, wherein said comparator means is electrically coupled to saidsignal processing circuit means and is arranged to compare the level ofa signal which is of a level substantially equivalent to that of theoutput signal of said photo-sensor array means with the level of saidreference signal.
 13. A device according to claim 9, wherein saidcomparator circuit means is electrically coupled to said photo-sensorarray means to compare the level of the output signal of said arraymeans with that of said reference signal.
 14. A device according toclaim 12, wherein said second electrical circuit means includes:a firstcomparator circuit for comparing the level of the output signal of saidphoto-sensor array means or that of a signal substantially equivalentthereto with the level of a first predetermined reference signal, thefirst comparator circuit producing a first predetermined output signalwhen the level of the output signal exceeds the level of the firstreference signal; a second comparator circuit for comparing the peakvalue of the output signal of said photo-sensor array means or the peakvalue of a signal substantially equivalent thereto with the level of asecond predetermined reference signal which is of a lower level thansaid first reference signal, the second comparator circuit producing asecond predetermined output signal when the peak value of said outputsignal becomes lower than the level of said second reference signal; anda selection circuit for changing the cyclical interval of the base clockpulses to be supplied from said first electrical circuit means to saiddriver circuit means between at least a first cyclical interval and asecond cyclical interval which is longer than the first cyclicalinterval, said selection circuit being electrically coupled to saidfirst electrical circuit means and to said first and second comparatorcircuits to change the cyclical interval of the base clock pulsesgenerated by the first circuit means from the second cyclical intervalto the first cyclical interval in response to the first output signal ofthe first comparator circuit and also to change the cyclical interval ofthe base clock pulses from the first cyclical interval to the secondcyclical interval in response to the second output signal of said secondcomparator circuit.
 15. A device according to claim 2, wherein saidfirst electrical circuit means includes:a base clock pulse generatingcircuit which generates base clock pulses at cyclic intervals inaccordance with input voltage thereto; and wherein said secondelectrical circuit means is electrically coupled to said pulsegenerating circuit to adjust the input voltage to said generatingcircuit to correspond to the brightness of the object.
 16. A deviceaccording to claim 15, wherein said second electrical circuit meansincludes:a brightness measuring circuit for measuring the objectbrightness, said measuring circuit being electrically coupled to saidbase clock pulse generating circuit to supply the generating circuitwith a voltage corresponding to the brightness of the object.
 17. Adevice according to claim 1, wherein said control circuit meanscomprises:first electrical circuit means electrically coupled to saiddriver circuit means for providing the driver circuit means with firstintermittent base clock pulses and causing said driver circuit means togenerate said scanning pulses on the basis of said first clock pulsessupplied from the first electrical circuit means; second electricalcircuit means electrically coupled to said driver circuit means forproviding said driver circuit means with second intermittent base clockpulses having a cyclical interval longer than that of said first baseclock pulses, said driver circuit means generating said start pulses onthe basis of said second clock pulses supplied from said second circuitmeans; and third electrical circuit means for controlling the cyclicalinterval of said second clock pulses to be supplied from said secondcircuit means to said first circuit means in correspondence with theobject brightness, said third electrical circuit means beingelectrically coupled to said second circuit means.
 18. A deviceaccording to claim 17, wherein said second electrical circuit means iselectrically coupled to said first electrical circuit means to producesaid second clock pulses by frequency dividing said first clock pulses;and wherein said third electrical circuit means includes:an adjustmentcircuit electrically coupled to said second circuit means for adjustingthe value of frequency division performed by said second electricalcircuit means to correspond to the brightness of the object.
 19. Adevice according to claim 18, wherein said adjustment circuitincludes:comparator means for comparing the level of the output signalof said photo-sensor array means or a signal of a level substantiallyequivalent thereto with the level of a predetermined reference signal,said comparator means producing a predetermined output signal when thelevel of said output signal of the photo-sensor array means or a signalof a level substantially equivalent thereto exceeds the level of thereference signal; and selection means for changing the frequencydividing value of said second electrical circuit means at least betweenN and N' which is smaller than N, said selection means beingelectrically coupled to said second circuit means and to said comparatormeans to change the frequency dividing value of the second electricalcircuit means at least from N to N' in response to the output signal ofsaid comparator means.
 20. A device according to claim 19, wherein saidcomparator means is electrically coupled to a part of said signalprocessing circuit means to compare a signal of a level which issubstantially equivalent to the output signal of said photo-sensor arraymeans with the level of said reference signal.
 21. A device according toclaim 19, wherein said comparator means is electrically coupled to saidphoto-sensor array means to compare the level of the output signal ofthe array means with the level of said reference signal.
 22. A deviceaccording to claim 18, wherein said adjustment circuit includes:firstcomparator means for comparing the level of the output of saidphoto-sensor array means or that of a signal substantially equivalentthereto with the level of a first predetermined reference signal and forproducing a first predetermined output signal when the level of theoutput signal of the photo-sensor array means exceeds that of said firstreference signal: second commparator means for comparing the peak valueof the output of said photo-sensor array means or that of a signalsubstantially equivalent thereto with a second predetermined referencesignal which is of a level lower than the first reference signal and forproducing a second predetermined output signal when the peak value ofsaid output signal of the photo-sensor array means drops lower than thelevel of said second predetermined reference signal; and a selectionmeans for changing the frequency dividing value of said secondelectrical circuit means between N and N' which is smaller than N, saidselection means being electrically coupled to said second circuit meansand to said first and second comparator means to change the frequencydividing value of said second electrical circuit means from N to N' inresponse to the first output signal of said first output signal of saidfirst comparator means and to change the frequency dividing value fromN' to N in response to the second output signal of said secondcomparator means.
 23. A device according to claim 17, wherein saidsecond electrical circuit means is electrically coupled to said firstelectrical circuit means to produce said second clock pulses byfrequency dividing said first clock pulses; and wherein said controlcircuit means further comprises:fourth electrical circuit means forcontrolling the cyclic intervals at which said first clock pulses aregenerated in correspondence to the object brightness, said fourthelectrical circuit means being electrically coupled to said firstelectrical circuit means.
 24. A device according to claim 23, whereinsaid control circuit means further comprises:fifth electrical circuitmeans for controlling the operation of said third and fourth electricalcircuit means, said fifth electrical circuit means being electricallycoupled to said third and forth electrical circuit means to actuate atleast one of the third and the fourth circuit means for corresponding tothe brightness of the object.
 25. An image sharpness detecting devicefor detecting the sharpness of an image of an object formed by an imageforming optical system on a predetermined imaging plane comprising:(A)photo-sensor array means having a plurality of electric charge storingtype photo-sensor elements at a position substantially corresponding tosaid imaging plane; (B) driver circuit means for electrically drivingsaid photo-sensor array means, said driver circuit means beingelectrically coupled to the array means to provide the array means withintermittent start pulses occurring at a cyclical interval andintermittent scanning pulses, and for driving the array means to causeit to produce, one after another in time series, outputs of electriccharge stored in each photo-sensor element during a period of timecorresponding to the cyclical interval of said start pulses, saidelectric charge being stored in each photo-sensor element incorrespondence with the brightness of each portion in the imagecorresponding to the photo-sensor element within said period of time;(C) detecting circuit means electrically coupled to said photo-sensorarray means to detect the sharpness of the image formed by said opticalsystem on said imaging plane and for producing an electrical outputrepresentative of the sharpness of the image formed by the opticalsystem by processing the output signal of the array means; (D) controlcircuit means for controlling the electric charge storing time ofphoto-sensor elements in said array means to correspond to thebrightness of the object, said control circuit means being electricallycoupled to said driver circuit means to control the electric chargestoring time of said photo-sensor elements by adjusting the cyclicalinterval of the start pulses supplied from the driver circuit means tothe photo-sensor array means in correspondence with the objectbrightness; and (E) said control circuit means including means fordetecting the brightness of at least a portion of the image appearing atthe photo-sensor array means within a period of time, means forestablishing a range of reference values and control means for adjustingthe scanning recycle time duration in response to said detecting meansdetecting that the instantaneous brightness of at least a portion of theimage appearing at the photo-sensor array means deviates from thepredetermined range of reference values.
 26. A device according to claim25, wherein said control circuit means comprises:first electricalcircuit means electrically coupled to said driver circuit means forproviding the driver circuit means with intermittent base clock pulsesand for generating said scanning pulses and said start pulses on thebasis of said base clock pulses supplied from the first circuit means;and second electric circuit means electrically coupled to said firstcircuit means to control the cyclical interval of said base clock pulsesto be supplied from said first circuit means to said driver circuitmeans in accordance with the brightness of the object, so that thecyclical interval of the start pulses generated by said driver circuitmeans are adjusted in correspondence to the brightness of the object byadjusting the generating cycle interval of the base clock pulses to besupplied to said driver circuit means in correspondence with the objectbrightness.
 27. A device according to claim 26, wherein(a) said firstelectrical circuit means includes:a base clock pulse generating circuitcapable of generating at least first intermittent base clock pulseshaving a first cyclical interval and second intermittent base clockpulses having a second cyclical interval longer than the cyclicalinterval of the first base clock pulses; and a selection circuit forselectively supplying at least said first base clock pulses or saidsecond base clock pulses to said driver circuit means, said selectioncircuit being electrically coupled to said base clock pulse generatingcircuit and to said driver circuit means; and wherein (b) said secondelectrical circuit means includes:a control circuit for controlling saidselection circuit in correspondence with the brightness of the object,said control circuit being electrically coupled to said selectioncircuit to control the selection circuit in correspondence with theobject brightness for selection of the base clock pulses to be suppliedto said driver circuit means.
 28. A device according to claim 27,wherein said control circuit includes:comparator means for comparing thelevel of the output signal of said photo-sensor array means or a signallevel which is substantially equivalent thereto with the level of apredetermined reference signal and for producing a predetermined outputsignal when the level of said output signal of the photo-sensor arraymeans exceeds the level of said reference signal, and wherein saidselection circuit is electrically coupled to said comparator means tochange the base clock pulses to be supplied to said driver circuit meansfrom said second base clock pulses to said first base clock pulses inresponse to the output signal of said comparator means.
 29. A deviceaccording to claim 26, wherein said second electrical circuit meansincludes:a comparator circuit which compares the level of the outputsignal of said photo-sensor array means or that of a signalsubstantially equivalent thereto with the level of a predeterminedreference signal and for producing a predetermined output signal whenthe level of the output signal of the photo-sensor array means exceedsthe level of said reference signal, and a selection circuit for changingthe cyclical interval of the base clock pulses to be supplied from saidfirst electrical circuit means to said driver circuit means between atleast a first cyclical interval and a second cyclical interval which islonger than the first cyclical interval, said selection circuit beingelectrically coupled to said first electrical circuit means and to saidcomparator circuit to change the cyclical interval of the base clockpulses to be generated by the first circuit means from the secondcyclical interval to the first cyclical interval in response to theoutput signal of said comparator circuit.
 30. A device according toclaim 29, wherein said first electrical circuit means includes:a baseclock pulse generating circuit which generates base clock pulses atintervals in accordance with input voltage; and wherein said selectioncircuit is electrically coupled to said base clock pulse generatingcircuit to change the input voltage to the base clock pulse generatingcircuit from a second voltage value required for obtaining said secondcyclical interval to a first voltage value required for obtaining saidfirst cyclical interval in response to the output signal of saidcomparator circuit.
 31. A device according to claim 25, wherein saidcontrol circuit means comprises:first electrical circuit meanselectrically coupled to said driver circuit means for providing thedriver circuit means with first intermittent base clock pulses; saiddriver circuit means generating said scanning pulses on the basis ofsaid first clock pulses from the first electrical circuit means; secondelectrical circuit means electrically coupled to said driver circuitmeans for providing said driver circuit means with second intermittentbase clock pulses having a cyclical interval longer than that of saidfirst base clock pulses, said driver circuit means generating said startpulses based on said second clock pulses from said second circuit means;and third electrical circuit means for controlling the cyclical intervalof said second clock pulses from said second circuit means to said firstcircuit means in correspondence with the object brightness, said thirdelectrical circuit means being electrically coupled to said secondcircuit means.
 32. A device according to claim 31, wherein said secondelectrical circuit means is electrically coupled to said firstelectrical circuit means to produce said second clock pulses byfrequency dividing said first clock pulses; and wherein said controlcircuit means further comprises:fourth electrical circuit means forcontrolling the cyclic intervals at which said first clock pulses aregenerated in correspondence with the object brightness, said fourthelectrical circuit means being electrically coupled to said firstelectrical circuit means.
 33. A device according to claim 32, whereinsaid control circuit means further comprises:fifth electrical circuitmeans for controlling the operation of said third and fourth electricalcircuit means, said fifth electrical circuit means being electricallycoupled to said third and fourth electrical circuit means to actuate atleast one of the third and fourth circuit means in correspondence withthe brightness of the object.
 34. A range finding device for detectingthe distance between the device and an object, comprising:(A) a rangefinding optical system forming two images of said object with relativepositional differences corresponding to the distance to the object; (B)photo-sensor array means arranged to receive said two images formed bysaid range finding optical system and to provide electrical signalsrepresentative of the relative position of one of said two images withrespect to the position of the other image; said array means having aplurality of electric charge storing type photo-sensor elements; (C)driver circuit means for electrically driving said photo-sensor arraymeans, said driver circuit means being electrically coupled to the arraymeans to provide the array means with intermittent start pulses andintermittent scanning pulses to cause the array means to produce, oneafter another in time series, the outputs of electric charge stored ineach photo-sensor element during a period of time corresponding to thecyclical interval of said start pulses, said electric charge beingstored in each photo-sensor element in correspondence to the brightnessof each picture portion in the image corresponding to the photo-sensorelement within said period of time; (D) detecting circuit meanselectrically coupled to said photo-sensor array means so as to detectdistance to the object and produce an electrical output representativeof the distance between the range finding device and the object byprocessing said electrical signals of the array means; (E) controlcircuit means for controlling the electric charge storing time of saidphoto-sensor elements in said array means in correspondence to thebrightness of the object, said control circuit means being electricallycoupled to said driver circuit means to control the electric chargestoring time of said photo-sensor elements by adjusting the cyclicalinterval of the start pulses supplied from the driver circuit means tothe photo-sensor array means in correspondence with the objectbrightness; and (F) said control circuit means including detecting meansfor detecting the brightness of at least a portion of the imageappearing at the photo-sensor array means within a period of time, meansfor establishing a range of reference values and control means foradjusting the scanning recycle time duration in response to saiddetecting means detecting that the instantaneous brightness of at leasta portion of the image appearing at the photo-sensor array meansdeviates from the predetermined range of reference values.
 35. A deviceaccording to claim 34, wherein said control circuit meanscomprises:first electrical circuit means electrically coupled to saiddriver circuit means for providing the driver circuit means withintermittent base clock pulses, said driver circuit means generatingsaid scanning pulses and said start pulses on the basis of said baseclock pulses from the first circuit means; and second electrical circuitmeans electrically coupled to said first circuit means to control thecyclical interval of said base clock pulses from said first circuitmeans to said driver circuit means in accordance with the brightness ofthe object, the cyclical interval of the start pulses to be generated bysaid driver circuit means thus being adjusted in correspondence with thebrightness of the object by adjusting the cyclical interval of the baseclock pulses to said driver circuit means in correspondence with theobject brightness.
 36. A device according to claim 35, wherein(a) saidfirst electrical circuit means includes:a base clock pulse generatingcircuit which is capable of generating at least first intermittent baseclock pulses having a first cyclical interval and second intermittentbase clock pulses having a second cyclical interval longer than thecyclical interval of the first base clock pulses; and a selectioncircuit for selectively supplying at least said first base clock pulsesor said second base clock pulses to said driver circuit means, saidselection circuit being electrically coupled to said base clock pulsegenerating circuit and to said driver circuit means; and wherein (b)said second electrical circuit means includes: a control circuit forcontrolling said selection circuit in correspondence with the brightnessof the object, said control circuit being electrically coupled to saidselection circuit to control the selection circuit in correspondencewith the object brightness for selection of the base clock pulses tosaid driver circuit means.
 37. A device according to claim 36, whereinsaid control circuit includes:comparator means for comparing the levelof the output signal of said photo-sensor array means or a signal levelwhich is substantially equivalent thereto with the level of apredetermined reference signal and for producing a predetermined outputsignal when the level of said output signal of the photo-sensor arraymeans exceeds the level of said reference signal, and wherein saidselection circuit is electrically coupled to said comparator means tochange the base clock pulses to said driver circuit means from saidsecond base clock pulses to said first base clock pulses in response tothe output signal of said comparator means.
 38. A device according toclaim 37, wherein said base clock generating circuit includes:oscillatormeans for providing said first intermittent base clock pulses; andfrequency dividing means for providing said second intermittent baseclock pulses by frequency dividing said first base clock pulses, thefrequency dividing means being electrically coupled to said oscillatormeans, and wherein said selection circuit is electrically coupled toboth the oscillator means and the frequency dividing means to change thebase clock pulses to said driver circuit means from the second baseclock pulses provided by the frequency dividing means to the first baseclock pulses provided by said oscillator means in response to the outputsignal of said comparator means.
 39. A device according to claim 36,wherein said control circuit includes:first comparator means forcomparing the level of the output signal of said photo-sensor arraymeans or that of a signal substantially equivalent thereto with thelevel of a first predetermined reference signal, the first comparatormeans producing a first predetermined output signal when the level ofthe output signal of the photo-sensor array means exceeds the level ofthe first reference signal; and second comparator means for comparingthe peak value of the output signal of said photo-sensor array means orthe peak value of a signal substantially equivalent thereto with thelevel of a second predetermined reference signal which is of a lowerlevel than said first reference signal and for producing a secondpredetermined output signal when the peak value of said output signal ofthe photo-sensor array means is lower than the level of said secondreference signal, and wherein said selection circuit is electricallycoupled to said first and second comparator means to change the baseclock pulses to said driver circuit means from the second base clockpulses to the first base clock pulses in response to said first outputsignal of the first comparator means and to change the base clock pulsesfrom the first base clock pulses to the second base clock pulses inresponse to said second output signal of the second comparator means.40. A device according to claim 35, wherein said second electricalcircuit means includes:a comparator circuit for comparing the level ofthe output signal of said photo-sensor array means or that of a signalsubstantially equivalent thereto with the level of a predeterminedreference signal, the comparator circuit producing a predeterminedoutput signal when the level of the output signal of the photo-sensorarray means exceeds the level of said reference signal; and a selectioncircuit for changing the cyclical interval of the base clock pulses tobe supplied from said first electrical circuit means to said drivercircuit means between at least a first cyclical interval and a secondcyclical interval which is longer than the first cyclical interval, saidselection circuit being electrically coupled to said first electricalcircuit means and to said comparator circuit to change the cyclicalinterval of the base clock pulses generated by the first circuit meansfrom the second cyclical interval to the first cyclical interval inresponse to the output signal of said comparator circuit.
 41. A deviceaccording to claim 40, wherein said first electrical circuit meansincludes:a base clock pulse generating circuit which generates baseclock pulses at cyclical intervals in accordance with input voltage; andwherein said selection circuit is electrically coupled to said baseclock pulse generating circuit to change the input voltage to the baseclock pulse generating circuit from a second voltage value required forobtaining said second cyclical interval to a first voltage valuerequired for obtaining said first cyclical interval in response to theoutput signal of said comparator circuit.
 42. A device according toclaim 35, wherein said second electrical circuit means includes:a firstcomparator circuit for comparing the level of the output signal of saidphoto-sensor array means or that of a signal substantially equivalentthereto with the level of a first predetermined reference signal and forproducing a first predetermined output signal when the level of theoutput signal of the photo-sensor array means exceeds the level of thefirst reference signal; a second comparator circuit for comparing thepeak value of the output signal of said photo-sensor array means or thepeak vaue of a signal substantially equivalent thereto with the level ofa second predetermined reference signal which is of a lower level thansaid first reference signal and for producing a second predeterminedoutput signal when the peak value of said output signal of thephoto-sensor array means falls below the level of said second referencesignal; and a selection circuit for changing the cyclical interval ofthe base clock pulses from said first electrical circuit means to saiddriver circuit means between at least a first cyclical interval and asecond cyclical interval longer than the first cyclical interval, saidselection circuit being electrically coupled to said first electricalcircuit means and to said first and second comparator circuits to changethe cyclical interval of the base clock pulses generated by the firstcircuit means from the second cyclical interval to the first cyclicalinterval in response to the first output signal of the first comparatorcircuit and also to change the cyclical interval to the second cyclicalinterval in response to the second output signal of said secondcomparator circuit.
 43. A device according to claim 35, wherein saidfirst electrical circuit means includes:a base clock pulse generatingcircuit which generates base clock pulses at cyclic intervals inaccordance with input voltage thereto; and wherein said secondelectrical circuit means is electrically coupled to said pulsegenerating circuit to adjust the input voltage to said generatingcircuit in correspondence with the brightness of the object.
 44. Adevice according to claim 34, wherein said control circuit meanscomprises:first electrical circuit means electrically coupled to saiddriver circuit means for providing the driver circuit means with firstintermittent base clock pulses; said driver circuit means being arrangedfor generating said scanning pulses on the basis of said first clockpulses supplied from the first electrical circuit means; secondelectrical circuit means electrically coupled to said driver circuitmeans for providing said driver circuit means with second intermittentbase clock pulses having a cyclic interval longer than that of saidfirst base clock pulses, said driver circuit means generating said startpulses based on said second clock pulses supplied from said secondcircuit means; and third electrical circuit means for controlling thecyclic interval of said second clock pulses to be supplied from saidsecond circuit means to said first circuit means in correspondence withthe object brightness, said third electrical circuit means beingelectrically coupled to said second circuit means.
 45. A deviceaccording to claim 44, wherein said second electrical circuit means iselectrically coupled to said first electrical circuit means to producesaid second clock pulses by frequency dividing said first clock pulses;and wherein said third electrical circuit means includes:an adjustmentcircuit which adjust the value of frequency division made by said secondelectrical circuit means in correspondence with the brightness of theobject, the adjustment circuit being electrically coupled to said secondcircuit means.
 46. A device according to claim 45, wherein saidadjustment circuit includes:comparator means for comparing the level ofthe output signal of said photo-sensor array means or a signal of alevel substantially equivalent thereto with the level of a predeterminedreference signal and for producing a predetermined output signal whenthe level of said output signal of the photo-sensor array means exceedsthe level of the reference signal; and selection means for changing thefrequency dividing value of said second electrical circuit means atleast between N and N' which is smaller than N, said selection meansbeing electrically coupled to said second circuit means and to saidcomparator means to change the frequency dividing value of the secondelectrical circuit means at least from N to N' in response to the outputsignal of said comparator means.
 47. A device according to claim 46,wherein said adjustment circuit includes:first comparator means forcomparing the level of the output of said photo-sensor array means orthat of a signal substantially equivalent thereto with the level of afirst predetermined reference signal and for producing a firstpredetermined output signal when the level of the output signal of thephoto-sensor array means exceeds that of said first reference signal;second comparator means for comparing the peak value of the output ofsaid photo-sensor array means or that of a signal substantiallyequivalent thereto with a second predetermined reference signal which isof a level lower than the first reference signal and for producing asecond predetermined output signal when the peak value of said outputsignal of the photo-sensor array means drops below the level of saidsecond predetermined reference signal; and selection means for changingthe frequency dividing value of said second electrical circuit meansbetween N and N' which is smaller than N, said selection means beingelectrically coupled to said second circuit means and to said first andsecond comparator means to change the frequency dividing value of saidsecond electrical circuit means from N to N' in response to the firstoutput signal of said first comparator means and to change the frequencydividing value from N' to N in response to the second output signal ofsaid second comparator means.
 48. A device according to claim 44,wherein said second electrical circuit means is electrically coupled tosaid first electrical circuit means to produce said second clock pulsesby frequency dividing said first clock pulses; and wherein said controlcircuit means further comprises:fourth electrical circuit means forcontrolling the cyclic intervals at which said first clock pulses aregenerated in correspondence with the object brightness, said fourthelectrical circuit means being electrically coupled to said firstelectrical circuit means.
 49. A device according to claim 48, whereinsaid control circuit means further comprises:fifth electrical circuitmeans for controlling the operation of said third and fourth electricalcircuit means, said fifth electrical circuit means being electricallycoupled to said third and fourth electrical circuit means to actuate atleast one of the third and fourth circuit means in correspondence withthe brightness of the object.
 50. A focus detecting device for detectingthe focusing condition of an image forming lens system relative to anobject, said lens system having an optical axis and being adjustablealong the axis, said device comprising:(A) a range finding opticalsystem operatively associated with said image forming lens system forforming two images of the object with relative positional differenceswhich correspond to a degree of deviation of set positions of the lenssystem from a position at which the lens system is properly focused onthe object; (B) photo-sensor array means arranged relative to said rangefinding optical system to provide electrical signals representative ofthe relative position of one of said two images with respect to theposition of the other image, said array means having a plurality ofelectric charge storing type photo-sensor elements; (C) driver circuitmeans for electrically driving said photo-sensor array means, saiddriver circuit means being electrically coupled to the array means toprovide the array means with intermittent start pulses and intermittentscanning pulses and for driving the array means to cause it to produce,one after another in time series, outputs of the electric charge storedin each photo-sensor element during a period of time corresponding tothe cyclic interval of said start pulses, said electric charge beingstored in each photo-sensor element in correspondence with thebrightness of a portion of the image corresponding to the photo-sensorelement within said period of time; (D) signal processing circuit meansfor processing the electric signals of said photo-sensor array means,said signal processing circuit means being electrically coupled to thearray means to produce an electrical output representative of thefocusing of said image forming lens system to the object, on the basisof said electrical signals of the array means; (E) control circuit meansfor adjusting scanning recycle time duration in correspondence with thebrightness of the object, said control circuit being electricallycoupled to said driver circuit means to adjust the scanning recycle timeduration by adjusting the cyclic interval of said start pulses appliedto said array means in correspondence with the brightness of the object;and (F) said control circuit means including detecting means fordetecting the brightness of at least a portion of the image appearing atthe photo-sensor array means within a period of time, means forestablishing a range of reference values and control means for adjustingthe scanning recycle time duration in response to said detecting meansdetecting that the instantaneous brightness of at least a portion of theimage appearing at the photo-sensor array means deviates from thepredetermined range of reference values.
 51. A device according to claim50, wherein said control circuit means comprises:first electricalcircuit means electrically coupled to said driver circuit means forproviding the driver circuit means with intermittent base clock pulsesand for generating said scanning pulses and said start pulses on thebasis of said base clock pulses supplied from the first circuit means;and second electric circuit means electrically coupled to said firstcircuit means to control the cyclic interval of said base clock pulsesto be supplied from said first circuit means to said driver circuitmeans in accordance with the brightness of the object, the cyclicinterval of the start pulses benerated by said driver circuit meansbeing adjusted to correspond to the brightness of the object when thecyclic interval of the base clock pulses to said driver circuit means isadjusted to correspond to the object brightness.
 52. A device accordingto claim 51, wherein(a) said first electrical circuit means includes: abase clock pulse generating circuit which is capable of generating atleast first intermittent base clock pulses having a first cyclicinterval and second intermittent base clock pulses having a secondcyclic interval longer than the cyclic interval of the first base clockpulses; and a selection circuit for selectively supplying at least firstbase clock pulses or said second base clock pulses to said drivercircuit means, said selection circuit being electrically coupled to saidbase clock pulse generating circuit and to said driver circuit means,and wherein (b) said second electrical circuit means includes: a controlcircuit for controlling said selection circuit in correspondence withthe brightness of the object, said control circuit being electricallycoupled to said selection circuit to control the selection circuit incorrespondence with the brightness of the object for selection of thebase clock pulses supplied to said driver circuit means.
 53. A deviceaccording to claim 52, wherein said control circuit includes:comparatormeans for comparing the level of the output signal of said photo-sensorarray means or a signal level which is substantially equivalent theretowith the level of a predetermined reference signal and for producing apredetermined output signal when the level of said output signal of thephoto-sensor array means exceeds the level of said reference signal, andwherein said selection circuit is electrically coupled to saidcomparator means to change the base clock pulses to said driver circuitmenas from said second base clock pulses to said first base clock pulsesin response to the output signal of said comparator means.
 54. A deviceaccording to claim 51, wherein said second electrical circuit meansincludes:a comparator circuit for comparing the level of the outputsignal of said photo-sensor array means or that of a signalsubstantially equivalent thereto with the level of a predeterminedreference signal and for producing a predetermined output signal whenthe level of the output signal of the photo-sensor array means exceedsthe level of said reference signal; and a selection circuit for changingthe cyclic interval of the base clock pulses supplied from said firstelectrical circuit means to said driver circuit means between at least afirst cyclic interval and a second cyclic interval which is longer thanthe first cyclic interval, said selection circuit being electricallycoupled to said first electrical circuit means and to said comparatorcircuit to change the cyclic interval of the base clock pulses generatedby the first circuit means from the second cyclic interval to the firstcyclic interval in response to the output signal of said comparatorcircuit.
 55. A device according to claim 54, wherein said firstelectrical circuit means includes:a base clock pulse generating circuitwhich generates base clock pulses at intervals in accordance with inputvoltage; and wherein said selection circuit is electrically coupled tosaid base clock pulse generating circuit to change the input voltage tothe base clock pulse generating circuit from a second voltage valuerequired for obtaining said second cyclic interval to a first voltagevalue required for obtaining said first cyclic interval in response tothe output signal of said comparator circuit.
 56. A device according toclaim 50, wherein said control circuit means comprises:first electricalcircuit means electrically coupled to said driver circuit means forproviding the driver circuit means with first intermittent base clockpulses; said driver circuit means being arranged for generating saidscanning pulses on the basis of said first clock pulses supplied fromthe first electrical circuit means; second electrical circuit meanselectrically coupled to said driver circuit means for providing saiddriver circuit means with second intermittent base clock pulses having acyclic interval longer than that of said first base clock pulses, saiddriver circuit means generating said start pulses based on said secondclock pulses supplied from said second circuit means; and thirdelectrical circuit means for controlling the cyclic interval of saidsecond clock pulses to be supplied from said second circuit means tosaid first circuit means in correspondence with the object brightness,said third electrical circuit means being electrically coupled to saidsecond circuit means.
 57. A device according to claim 56, wherein saidsecond electrical circuit means is electrically coupled to said firstelectrical circuit means to produce said second clock pulses byfrequency dividing said first clock pulses; and wherein said controlcircuit means further comprises:fourth electrical circuit means forcontrolling the cyclic intervals at which said first clock pulses aregenerated in correspondence to the object brightness, said fourthelectrical circuit means being electrically coupled to said firstelectrical circuit means.
 58. A device according to claim 57, whereinsaid control circuit means further comprises:fifth electrical circuitmeans for controlling the operation of said third and fourth electricalcircuit means, said fifth electrical circuit means being electricallycoupled to said third and fourth electrical circuit means to actuate atleast one of the third and the fourth circuit means in correspondencewith the brightness of the object.
 59. A focus detecting device fordetecting the focusing of an image forming optical system relative to anobject, said optical system having an optical axis and being adjustablealong the axis so as to form an image of the object on a predeterminedfocusing plane, said device comprising:(A) photo-sensor array meanshaving a plurality of photo-sensor elements of an electric chargestoring and discharging type, said array means being positionedsubstantially corresponding to said focusing plane, each photo-sensorelement being arranged to discharge an amount of stored electric chargecorresponding to an integrated amount of light incident thereon; (B)driver circuit means for electrically driving said photo-sensor arraymeans, said driver circuit means being electrically coupled to the arraymeans to provide the array means with intermittent start pulses having acyclical interval and intermittent scanning pulses and for driving thearray means to cause it to produce, one after another in time series,signals corresponding to electric charge discharged from eachphoto-sensor element during a period of time corresponding to thecyclical interval of said start pulses, said electric charge beingdischarged from each photo-sensor element in correspondence with thebrightness of each portion in the image corresponding to thephoto-sensor element within said period of time; (C) signal processingcircuit means for processing the output signal of said photo-sensorarray means, said processing circuit means being electrically coupled tothe array means to provide an electrical output representative of thefocusing of the optical system with respect to the object, on the basisof said output signal of the array means; (D) control circuit means foradjusting the scanning recycle time duration to correspond to thebrightness of the object, said control circuit being electricallycoupled to said driver circuit means to adjust the scanning recycle timeduration by adjusting the cyclic interval of said start pulses appliedto said array means in correspondence with the brightness of the object;and (E) said control circuit means including detecting means fordetecting the brightness of at least a portion of the image appearing atthe photo-sensor array means within a period of time, means forestablishing a range of reference values and control means for adjustingthe scanning recycle time duration in response to said detecting meansdetecting that the instantaneous brightness of at least a portion of theimage appearing at the photo-sensor array means deviates from thepredetermined range of reference values.
 60. A range finding device fordetecting the distance between the device and an object, comprising:(A)a range finding optical system forming two images of said object with arelative positional difference corresponding to the distance to theobject; (B) photo-sensor array means arranged to receive said two imagesformed by said range finding optical system and to provide electricalsignals representative of the relative position of one of said twoimages with respect to the position of the other image; said array meanshaving a plurality of photo-sensor elements of an electric chargestoring and discharging type, each photo-sensor element being arrangedto discharge an amount of stored electric charge corresponding to anintegrated amount of light incident thereon; (C) driver circuit meansfor electrically driving said photo-sensor array means, said drivercircuit means being electrically coupled to the array means to providethe array means with intermittent start pulses having a cyclicalinterval and intermittent scanning pulses and for driving the arraymeans to cause it to produce, one after another in time series, signalscorresponding to electric charge discharged from each photo-sensorelement during a period of time corresponding to the cyclical intervalof said start pulses, and for discharging said electric charge from eachphoto-sensor element in correspondence with the brightness of eachportion of the image corresponding to a photo-sensor element within saidperiod of time; (D) detecting circuit means electrically coupled to saidphoto-sensor array means to detect the distance to the object and toproduce an electrical output representative of the distance between therange finding device and the object by processing said electricalsignals of the array means; (E) control circuit means for adjusting theelectric charge discharging time of said photo-sensor elements in saidarray means in correspondence with the object brightness, said controlcircuit means being electrically coupled to said driver circuit means toadjust the electric charge discharging time of said photo-sensorelements by adjusting the cyclical interval of the start pulses fromsaid driver circuit means to the array means in correspondence with theobject brightness; and (F) said control circuit means includingdetecting means for detecting the brightness of at least a portion ofthe image appearing at the photo-sensor array means within a period oftime, means for establishing a range of reference values and controlmeans for adjusting the scanning recycle time duration in response tosaid detecting means detecting that the instantaneous brightness of atleast a portion of the image appearing at the photo-sensor array meansdeviates from the predetermined range of reference values.
 61. A focusdetecting device for detecting the focusing of an image forming lenssystem relative to an object, said lens system having an optical axisand being adjustable along the axis, said device comprising:(A) a rangefinding optical system operatively associated with said image forminglens system and forming two images of the object with a relativepositional difference which corresponds to the deviation of the setposition of the lens system from a position at which the lens system isproperly focused on the object; (B) photo-sensor array means arranged toreceive the two images formed by said range finding optical system andto provide electrical signals representative of the relative position ofone of said two images with respect to the position of the other image;said array means having a plurality of photo-sensor elements of anelectric charge storing and discharging type, each photo-sensor elementbeing arranged to discharge an amount of stored electric chargecorresponding to an integrated amount of light incident thereon; (C)driver circuit means for electrically driving said photo-sensor arraymeans, said driver circuit means being electrically coupled to the arraymeans to provide the array means with intermittent start pulses having acyclical interval and intermittent scanning pulses and for driving thearray means to cause it to produce, one after another in time series,signals corresponding to the electric charge discharged from eachphoto-sensor element during a period of time corresponding to thecyclical interval of said start pulses, said electric charge beingdischarged from each photo-sensor element in corresponding with thebrightness of each portion in the image corresponding to thephoto-sensor element within said period of time; (D) signal processingcircuit means for processing the electrical signals of said photo-sensorarray means, said processing circuit means being electrically coupled tothe array means to produce an electrical output representative of thefocusing of said image forming lens system to the object, one the basisof said electrical signals of the array means; (E) control circuit meansfor adjusting the scanning recycle time duration in correspondence withthe brightness of the object, said control circuit being electricallycoupled to said driver circuit means to accomplish the adjustment of thescanning recycle time duration by adjusting the cyclical interval ofsaid start pulses to be applied to said array means in correspondencewith the brightness of the object; and (F) said control circuit meansincluding detecting means for detecting the brightness of at least aportion of the image appearing at the photo-sensor array means within aperiod of time, means for establishing a range of reference values andcontrol means for adjusting the scanning recycle time duration inresponse to said detecting means detecting that the instantaneousbrightness of at least a portion of the image appearing at thephoto-sensor array means deviates from the predetermined range ofreference values.
 62. In a device comprising:(a) optical means forforming one or more images of an object; (b) sensing means arranged toreceive said one or more images formed by said optical means to provideone or more image signals on said one or more images, said sensing meanshaving one or more arrays of a plurality of electrical charge storingtype or electrical charge discharging type sensing elements; (c) circuitmeans responsive to said one or more image signals provided by saidsensing means to provide an output signal representative of imagingcondition of said one or more images formed by the optical means; theimprovement further comprising:(A) time control means for controllingthe electrical charge storing or electrical charge discharging time ofsaid sensing elements in said sensing means, said time control meansbeing capable of selecting a time from a plurality of different times;and (B) detection means for detecting whether the peak level of at leasta portion of the output signal of said sensing means is above apredetermined first level and whether the peak level of at least aportion of the output signal of said sensing means is below apredetermined second level lower than said first level, said detectionmeans providing a first signal when detecting that the peak level of atleast a portion of the output signal of the sensing means is above saidfirst level and providing a second signal when detecting that the peaklevel of at least a portion of the output signal of the sensing means isbelow the second level;said time control means being coupled to saiddetection means and changing the electrical charge storing or electricalcharge discharging time of said sensing elements to a shorter time inresponse to said first signal provided by the detection means andchanging the electrical charge storing or electrical charge dischargingtime of said sensing elements to a longer time in response to saidsecond signal provided by said detection means.
 63. In a devicecomprising:(a) optical means for forming one or more images of anobject; (b) sensing means arranged to receive said one or more imagesformed by said optical means to provide one or more image signals onsaid one or more images, said sensing means having one or more arrays ofa plurality of electrical charge storing type or electrical chargedischarging type sensing elements; and (c) circuit means responsive tosaid one or more image signals provided by said sensing means to providean output signal representative of image condition of said one or moreimages formed by the optical means; the improvement furthercomprising:(A) time control means for controlling the electrical chargestoring or electrical charge discharging time of said sensing elementsin said sensing means, said time control means being capable ofselecting a time from a plurality of different times; and (B) detectionmeans for detecting whether the peak level of at least a portion of theoutput signal of said sensing means is above a predetermined level, saiddetection means providing a signal when detecting that the peak level ofat least a portion of the output signal of the sensing means is abovesaid predetermined level;said time control means being responsive tosaid signal provided by said detection means to change the electricalcharge storing or electrical charge discharging time of said sensingelements to a shorter time.
 64. In a device comprising:(a) optical meansfor forming one or more images of an object; (b) sensing means arrangedto receive said one or more images formed by said optical means toprovide one or more image signals on said one or more images, saidsensing means having one or more arrays of a plurality of electricalcharge storing type or electrical charge discharging type sensingelements; and (c) circuit means responsive to said one or more imagesignals provided by said sensing means to provide an output signalrepresentative of imaging condition of said one or more images formed bythe optical means; the improvement further comprising:(A) time controlmeans for controlling the electrical charge storing or electrical chargedischarging time of said sensing elements in said sensing means, saidtime control means being capable of selecting a time from a plurality ofdifferent times; and (B) detection means for detecting whether the peaklevel of at least a portion of the output signal of said sensing meansis below a predetermined level and for providing a signal when detectingthat the peak level of at least a portion of the output signal of thesensing means is below said predetermined level;said time control meansbeing responsive to said signal provided by said detection means tochange the electrical charge storing or electrical charge dischargingtime of said sensing elements to a longer time.